INTEGRATED CIRCUITS P87C51RA2/RB2/RC2/RD2 80C51 8-bit microcontroller family 8KB/16KB/32KB/64KB OTP, 512B/512B/512B/1KB RAM, low voltage (2.7 to 5.5 V), low power, high speed (30/33 MHz) Product data Supersedes data of 2002 Oct 28 2003 Jan 24 Philips Semiconductors Product data 80C51 8-bit microcontroller family 8KB/16KB/32KB/64KB OTP P87C51RA2/RB2/RC2/RD2 with 512B/1KB RAM, low voltage (2.7 to 5.5 V), low power, high speed (30/33 MHz) DESCRIPTION CMOS and TTL compatible The devices are Single-Chip 8-Bit Microcontrollers manufactured in Two speed ranges at V = 5 V CC an advanced CMOS process and are derivatives of the 80C51 microcontroller family. The instruction set is 100% compatible with 0 to 30 MHz with 6-clock operation the 80C51 instruction set. 0 to 33 MHz with 12-clock operation The devices support 6-clock/12-clock mode selection by Parallel programming with 87C51 compatible hardware interface programming an OTP bit (OX2) using parallel programming. In to programmer addition, an SFR bit (X2) in the clock control register (CKCON) RAM expandable externally to 64 kbytes also selects between 6-clock/12-clock mode. Programmable Counter Array (PCA) The devices also have four 8-bit I/O ports, three 16-bit timer/event counters, a multi-source, four-priority-level, nested interrupt structure, PWM an enhanced UART and on-chip oscillator and timing circuits. Capture/compare The added features of the P87C51RA2/RB2/RC2/RD2 make it a PLCC, LQFP, or DIP package powerful microcontroller for applications that require pulse width modulation, high-speed I/O and up/down counting capabilities such Extended temperature ranges as motor control. Dual Data Pointers Security bits (3 bits) FEATURES Encryption array - 64 bytes 80C51 Central Processing Unit Seven interrupt sources 8 kbytes OTP (87C51RA2) 16 kbytes OTP (87C51RB2) 4 interrupt priority levels 32 kbytes OTP (87C51RC2) Four 8-bit I/O ports 64 kbytes OTP (87C51RD2) Full-duplex enhanced UART 512 byte RAM (87C51RA2/RB2/RC2) Framing error detection 1 kbyte RAM (87C51RD2) Automatic address recognition Boolean processor Fully static operation Three 16-bit timers/counters T0, T1 (standard 80C51) and additional T2 (capture and compare) Low voltage (2.7 V to 5.5 V at 16 MHz) operation Programmable clock-out pin 12-clock operation with selectable 6-clock operation (via software or via parallel programmer) Asynchronous port reset Memory addressing capability Low EMI (inhibit ALE, slew rate controlled outputs, and 6-clock Up to 64 kbytes ROM and 64 kbytes RAM mode) Power control modes: Wake-up from Power Down by an external interrupt Clock can be stopped and resumed Idle mode Power-down mode 2 2003 Jan 24 8532391 29335