PCA9517 2 Level translating I C-bus repeater Rev. 03 30 January 2007 Product data sheet 1. General description The PCA9517 is a CMOS integrated circuit that provides level shifting between low 2 voltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I C-bus or SMBus applications. 2 While retaining all the operating modes and features of the I C-bus system during the 2 level shifts, it also permits extension of the I C-bus by providing bidirectional buffering for both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Using the PCA9517 enables the system designer to isolate two halves of a bus for both voltage and capacitance. The SDA and SCL pins are over voltage tolerant and are high-impedance when the PCA9517 is unpowered. The 2.7 V to 5.5 V bus B-side drivers behave much like the drivers on the PCA9515A device, while the adjustable voltage bus A-side drivers drive more current and eliminate the static offset voltage. This results in a LOW on the B-side translating into a nearly 0 V LOW on the A-side which accommodates smaller voltage swings of lower voltage logic. The static offset design of the B-side PCA9517 I/O drivers prevent them from being connected to another device that has rise time accelerator including the PCA9510, PCA9511, PCA9512, PCA9513, PCA9514, PCA9515A, PCA9516A, PCA9517 (B-side), or PCA9518. The A-side of two or more PCA9517s can be connected together, however, to allow a star topography with the A-side on the common bus, and the A-side can be connected directly to any other buffer with static or dynamic offset voltage. Multiple PCA9517s can be connected in series, A-side to B-side, with no build-up in offset voltage with only time of ight delays to consider. The PCA9517 drivers are not enabled unless V is above 0.8 V and V is above 2.5 V. CCA CC The EN pin can also be used to turn the drivers on and off under system control. Caution should be observed to only change the state of the enable pin when the bus is idle. The output pull-down on the B-side internal buffer LOW is set for approximately 0.5 V, while the input threshold of the internal buffer is set about 70 mV lower (0.43 V). When the B-side I/O is driven LOW internally, the LOW is not recognized as a LOW by the input. This prevents a lock-up condition from occurring. The output pull-down on the A-side drives a hard LOW and the input level is set at 0.3V to accommodate the need for a CCA lower LOW level in systems where the low voltage side supply voltage is as low as 0.9 V. 2. Features n 2 channel, bidirectional buffer isolates capacitance and allows 400 pF on either side of the device n Voltage level translation from 0.9 V to 5.5 V and from 2.7 V to 5.5 V n Footprint and functional replacement for PCA9515/15A 2 n I C-bus and SMBus compatiblePCA9517 NXP Semiconductors 2 Level translating I C-bus repeater n Active HIGH repeater enable input n Open-drain input/outputs n Lock-up free operation n Supports arbitration and clock stretching across the repeater 2 n Accommodates Standard mode and Fast mode I C-bus devices and multiple masters 2 n Powered-off high-impedance I C-bus pins n A-side operating supply voltage range of 0.9 V to 5.5 V n B-side operating supply voltage range of 2.7 V to 5.5 V 2 n 5 V tolerant I C-bus and enable pins n 0 Hz to 400 kHz clock frequency (the maximum system operating frequency may be less than 400 kHz because of the delays added by the repeater). n ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101 n Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA n Packages offered: SO8 and TSSOP8 3. Ordering information Table 1. Ordering information T = - 40 C to +85 C amb Type number Topside Package mark Name Description Version PCA9517D PCA9517 SO8 plastic small outline package 8 leads body width 3.9 mm SOT96-1 1 PCA9517DP 9517 TSSOP8 plastic thin shrink small outline package 8 leads body width 3 mm SOT505-1 1 Also known as MSOP8 4. Functional diagram V V CCA CCB PCA9517 SDAA SDAB SCLA SCLB V CCB pull-up resistor EN 002aac200 GND Fig 1. Functional diagram of PCA9517 PCA9517 3 NXP B.V. 2007. All rights reserved. Product data sheet Rev. 03 30 January 2007 2 of 19