PMK50XP,518 NXP

PMK50XP P-channel TrenchMOS extremely low level FET Rev. 02 28 April 2010 Product data sheet 1. Product profile 1.1 General description Extremely low level P-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications only. 1.2 Features and benefits Low conduction losses due to low on-state resistance 1.3 Applications Battery management Load switching 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit V drain-source 25 C T 150 C - - -20 V DS j voltage I drain current T =25C V =-4.5V ---7.9A D sp GS see Figure 1 see Figure 3 P total power T =25C see Figure 2 --5 W tot sp dissipation Static characteristics R drain-source V =-4.5V I =-2.8A - 4050m DSon GS D on-state T =25C see Figure 9 j resistance see Figure 10 Dynamic characteristics Q gate-drain charge V =-4.5V I =-4.7A -1.3 -nC GD GS D V = -10 V see Figure 11 DS see Figure 12PMK50XP Nexperia P-channel TrenchMOS extremely low level FET 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline Graphic symbol 1S source D 8 5 2S source 3S source 4 G gate G 5 D drain 1 4 S 6 D drain SOT96-1 (SO8) 003aaa671 7 D drain 8 D drain 3. Ordering information Table 3. Ordering information Type number Package Name Description Version PMK50XP SO8 plastic small outline package 8 leads body width 3.9 mm SOT96-1 PMK50XP All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 02 28 April 2010 2 of 13