SAA7706H/N210S,557 NXP

INTEGRATED CIRCUITS DATA SHEET SAA7706H Car radio Digital Signal Processor (DSP) Product specication 2001 Mar 05 File under Integrated Circuits, IC01Philips Semiconductors Product specication Car radio Digital Signal Processor (DSP) SAA7706H 2 CONTENTS 8.13 I C-bus control (pins SCL and SDA) 8.14 Digital serial inputs/outputs and SPDIF inputs 1 FEATURES 8.14.1 General description digital serial audio inputs/outputs 1.1 Hardware 8.14.2 General description SPDIF inputs (SPDIF1 and 1.2 Software SPDIF2) 2 APPLICATIONS 8.14.3 Digital data stream formats 3 GENERAL DESCRIPTION 8.15 RDS demodulator (pins RDS CLOCK 4 QUICK REFERENCE DATA and RDS DATA) 8.15.1 Clock and data recovery 5 ORDERING INFORMATION 8.15.2 Timing of clock and data signals 6 BLOCK DIAGRAM 8.15.3 Buffering of RDS data 7 PINNING 8.15.4 Buffer interface 8.16 DSP reset 8 FUNCTIONAL DESCRIPTION 8.17 Test mode connections (pins TSCAN, RTCB 8.1 Analog front-end and SHTCB) 8.1.1 The realization of common mode input with AIC 2 9I C-BUS FORMAT 8.1.2 Realization of the auxiliary input with volume control 9.1 Addressing 8.1.3 Realization of the FM input control 9.2 Slave address (pin A0) 8.1.4 Pins VDACN1, VDACN2 and VDACP 9.3 Write cycles 8.1.5 Pin VREFAD 9.4 Read cycles 8.1.6 Supply of the analog inputs 9.5 SAA7706H hardware registers 8.2 The signal audio path for input signals CD, 9.5.1 SAA7706H DSPs registers 2 TAPE, AUX, PHONE, NAV and AM 9.6 I C-bus memory map specification 8.3 Signal path for level information 10 LIMITING VALUES 8.4 Signal path from FM MPX input to IAC and 11 THERMAL CHARACTERISTICS stereo decoder 8.4.1 Noise level 12 CHARACTERISTICS 8.4.2 Mono or stereo switching 2 13 RDS AND I S-BUS TIMING 8.4.3 The automatic lock system 2 14 I C-BUS TIMING 8.5 DCS clock 15 SOFTWARE DESCRIPTION 8.6 The Interference Absorption Circuit (IAC) 8.6.1 General description 16 APPLICATION DIAGRAM 8.7 The Filter Stream DAC (FSDAC) 17 PACKAGE OUTLINE 8.7.1 Interpolation filter 18 SOLDERING 8.7.2 Noise shaper 8.7.3 Function of pin POM 18.1 Introduction to soldering surface mount 8.7.4 Power-off plop suppression packages 8.7.5 Pin VREFDA for internal reference 18.2 Reflow soldering 8.7.6 Supply of the filter stream DAC 18.3 Wave soldering 8.8 Clock circuit and oscillator 18.4 Manual soldering 8.8.1 Supply of the crystal oscillator 18.5 Suitability of surface mount IC packages for 8.9 The phase-locked loop circuit to generate the wave and reflow soldering methods DSPs and other clocks 19 DATA SHEET STATUS 8.10 Supply of the digital part (V to V ) DDD3V1 DDD3V4 20 DEFINITIONS 8.11 CL GEN, audio clock recovery block 8.12 External control pins 21 DISCLAIMERS 8.12.1 DSP1 2 22 PURCHASE OF PHILIPS I C COMPONENTS 8.12.2 DSP2 2001 Mar 05 2