Freescale Semiconductor
Document Number: MPC5121E
Rev. 5, 02/2012
Data Sheet: Technical Data
MPC5121E/MPC5123
516 TEPBGA
27 mm x 27 mm
MPC5121E/MPC5123
Data Sheet
The MPC5121e/MPC5123 integrates a high performance On-chip temperature sensor
e300 CPU core based on the Power Architecture Technology IIM IC Identification module
with a rich set of peripheral functions focused on
communications and systems integration.
Major features of the MPC5121e/MPC5123 are:
e300 Power Architecture processor core
Power modes include doze, nap, sleep, deep sleep, and
hibernate
AXE Auxiliary Execution Engine
MBX Lite 2D/3D graphics engine (not available in
MPC5123)
DIU Display interface unit
DDR1, DDR2, and LPDDR/mobile-DDR SDRAM
memory controller
MEM 128 KB on-chip SRAM
USB 2.0 OTG controller with integrated physical layer
(PHY)
DMA subsystem
EMB Flexible multi-function external memory bus
interface
NFC NAND flash controller
LPC LocalPlus interface
10/100Base Ethernet
PCI interface, version 2.3
PATA Parallel ATA integrated development environment
(IDE) controller
SATA Serial ATA controller with integrated physical
layer (PHY)
SDHC MMC/SD/SDIO card host controller
PSC Programmable serial controller
2
I C inter-integrated circuit communication interfaces
S/PDIF Serial audio interface
CAN Controller area network
BDLC J1850 interface
VIU Video Input, ITU-656 compliant
RTC On-Chip real-time clock
Freescale Semiconductor, Inc., 2010-2012. All rights reserved.Table of Contents
1 Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3 3.3.11 FEC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
2 Pin Assignments. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5 3.3.12 USB ULPI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
2.1 516-TEPBGA Ball Map . . . . . . . . . . . . . . . . . . . . . . . . . .5 3.3.13 On-Chip USB PHY . . . . . . . . . . . . . . . . . . . . . . 60
2.2 Pinout Listings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 3.3.14 SDHC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
3 Electrical and Thermal Characteristics. . . . . . . . . . . . . . . . . .17 3.3.15 DIU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
3.1 DC Electrical Characteristics . . . . . . . . . . . . . . . . . . . .17 3.3.16 SPDIF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
3.1.1 Absolute Maximum Ratings. . . . . . . . . . . . . . . .17 3.3.17 CAN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
2
3.1.2 Recommended Operating Conditions . . . . . . . .18 3.3.18 I C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
3.1.3 DC Electrical Specifications. . . . . . . . . . . . . . . .19 3.3.19 J1850 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
3.1.4 Electrostatic Discharge . . . . . . . . . . . . . . . . . . .22 3.3.20 PSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
3.1.5 Power Dissipation . . . . . . . . . . . . . . . . . . . . . . .23 3.3.21 GPIOs and Timers . . . . . . . . . . . . . . . . . . . . . . 73
3.1.6 Thermal Characteristics. . . . . . . . . . . . . . . . . . .24 3.3.22 Fusebox . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
3.2 Oscillator and PLL Electrical Characteristics . . . . . . . .25 3.3.23 IEEE 1149.1 (JTAG) . . . . . . . . . . . . . . . . . . . . . 74
3.2.1 System Oscillator Electrical Characteristics . . .26 3.3.24 VIU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
3.2.2 RTC Oscillator Electrical Characteristics. . . . . .26 4 System Design Information . . . . . . . . . . . . . . . . . . . . . . . . . . 76
3.2.3 System PLL Electrical Characteristics. . . . . . . .26 4.1 Power Up/Down Sequencing. . . . . . . . . . . . . . . . . . . . 76
3.2.4 e300 Core PLL Electrical Characteristics . . . . .27 4.2 System and CPU Core AVDD Power Supply Filtering. 76
3.3 AC Electrical Characteristics. . . . . . . . . . . . . . . . . . . . .28 4.3 Connection Recommendations . . . . . . . . . . . . . . . . . . 77
3.3.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 4.4 Pull-Up/Pull-Down Resistor Requirements . . . . . . . . . 78
3.3.2 AC Operating Frequency Data. . . . . . . . . . . . . .28 4.4.1 Pull-Down Resistor Requirements for TEST pin78
3.3.3 Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 4.4.2 Pull-Up Requirements for the PCI Control Lines78
3.3.4 External Interrupts . . . . . . . . . . . . . . . . . . . . . . .32 4.5 JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
3.3.5 SDRAM (DDR) . . . . . . . . . . . . . . . . . . . . . . . . .32 4.5.1 TRST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
3.3.6 PCI. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34 4.5.2 e300 COP / BDM Interface . . . . . . . . . . . . . . . . 79
3.3.7 LPC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36 5 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
3.3.8 NFC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43 5.1 Package Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . 82
3.3.9 PATA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45 5.2 Mechanical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . 83
3.3.10 SATA PHY . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 6 Product Documentation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
MPC5121E/MPC5123 Data Sheet, Rev. 5
2 Freescale Semiconductor