TFA9882 3.4 W I2S input mono class-D audio amplifier Rev. 2 20 April 2011 Product data sheet 1. General description The TFA9882 is a mono, filter-free class-D audio amplifier in a 9-bump WLCSP (Wafer Level Chip-Size Package) with a 400 m pitch. 2 It receives audio and control settings via an I S digital interface. The Power-down to Operating mode transition is triggered when a clock signal is detected on the bit clock input (BCK). Two devices can be combined to build a stereo application. 2 In stereo applications, the left or right I S audio stream is selected by connecting the word select signal to, respectively, pin WSL or pin WSR. Mono mixing can be achieved by connecting the word select signal to both WSL and WSR. Switching off the word select signal selects Mute mode. The device features low RF susceptibility because it has a digital input interface that is insensitive to clock jitter. The second order closed loop architecture used in the TFA9882 provides excellent audio performance and high supply voltage ripple rejection. 2. Features and benefits Small outline WLCSP9 package: 1.27 1.49 0.6 mm Wide supply voltage range (fully operational from 2.5 V to 5.5 V) High efficiency (90 %, 4 /20 H load) and low power dissipation Quiescent power: 6.5 mW (V = 1.8 V, V = 3.6 V, 4 /20 H load, f =32 kHz) DDD DDP s 7.65 mW (V =1.8 V, V = 3.6 V, 4 /20 H load, f = 48 kHz) DDD DDP s Output power: 1.4 W into 4 at 3.6 V supply (THD = 1 %) 2.7 W into 4 at 5.0 V supply (THD = 1 %) 3.4 W into 4 at 5.0 V supply (THD = 10 %) Output noise voltage: 24 V (A-weighted) Signal-to-noise ratio: 103 dB (V = 5 V, A-weighted) DDP Fully short-circuit proof across load and to supply lines Current limiting to avoid audio holes Thermally protected Undervoltage and overvoltage protection High-pass filter for DC blocking Simplified interface for audio and control settings Left/right selection and mono mixing Three gain settings: 3dB, 0dB and +3 dBTFA9882 NXP Semiconductors 3.4 W I2S input mono class-D audio amplifier Output slope setting for EMI reduction Clip control for smooth clipping Mute mode Low RF susceptibility Insensitive to input clock jitter Pop noise free at all mode transitions Short power-up time: 4 ms Short power-down time: 5 s 1.8 V/3.3 V tolerant digital inputs Only two external components required 3. Applications PDAs Mobile phones Portable gaming devices Portable Navigation Devices (PND) Notebooks/netbooks Portable media players 4. Quick reference data Table 1. Quick reference data 1 1 All parameters are guaranteed for V = 3.6 V V = 1.8 V R = 4 L = 20 H f = 1 kHz DDP DDD L L i f = 48 kHz T = 25 C default settings, unless otherwise specified. s amb Symbol Parameter Conditions Min Typ Max Unit V power supply voltage on pin V 2.5 - 5.5 V DDP DDP V digital supply voltage on pin V 1.65 1.8 1.95 V DDD DDD I power supply current Operating mode with load - 1.5 1.7 mA DDP Mute mode - 1.1 1.25 mA Power-down mode - 0.1 1 A I digital supply current Operating mode - 1.25 1.4 mA DDD Mute mode - 1.1 1.2 mA Power-down mode -2.5 10 A BCK = WS = DATA = 0 V P RMS output power THD + N = 1 % o(RMS) V = 3.6 V, f = 100 Hz - 1.4 - W DDP i V = 5.0 V, f = 100 Hz - 2.7 - W DDP i THD + N = 10 % V = 3.6 V, f = 100 Hz - 1.75 - W DDP i V = 5.0 V, f = 100 Hz - 3.4 - W DDP i output power efficiency P =1.4 W - 90 - % po o(RMS) 1 R = load resistance L = load inductance. L L TFA9882 All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 2 20 April 2011 2 of 31