74ACQ574, 74ACTQ574 Quiet Series Octal D-Type Flip-Flop with 3-STATE Outputs April 2007 74ACQ574, 74ACTQ574 tm Quiet Series Octal D-Type Flip-Flop with 3-STATE Outputs Features General Description I and I reduced by 50% The ACQ/ACTQ574 is a high-speed, low-power octal CC OZ D-type flip-flop with a buffered Common Clock (CP) and Guaranteed simultaneous switching noise level and a buffered common Output Enable (OE). The information dynamic threshold performance presented to the D inputs is stored in the flip-flops on the Guaranteed pin-to-pin skew AC performance LOW-to-HIGH clock (CP) transition. Inputs and outputs on opposite sides of the package ACQ/ACTQ574 utilizes FACT Quiet Series technology allowing easy interface with microprocessors to guarantee quiet output switching and improve Functionally identical to the ACQ/ACTQ374 dynamic threshold performance. FACT Quiet Series fea- 3-STATE outputs drive bus lines or buffer memory tures GTO output control and undershoot corrector in address registers addition to a split ground bus for superior performance. Outputs source/sink 24mA The ACQ/ACTQ574 is functionally identical to the Faster prop delays than the standard AC/ACT574 ACTQ374 but with different pin-out. Ordering Information Package Order Number Number Package Description 74ACQ574SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Body 74ACQ574SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ACTQ574SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Body 74ACTQ574SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Device also available in Tape and Reel. Specify by appending suffix X to the ordering number. Connection Diagram Pin Descriptions Pin Names Description D D Data Inputs 0 7 CP Clock Pulse Input 3-STATE Output Enable Input OE O O 3-STATE Outputs 0 7 FACT, Quiet Series, FACT Quiet Series, and GTO are trademarks of Fairchild Semiconductor Corporation. 1990 Fairchild Semiconductor Corporation www.fairchildsemi.com 74ACQ574, 74ACTQ574 Rev. 1.374ACQ574, 74ACTQ574 Quiet Series Octal D-Type Flip-Flop with 3-STATE Outputs Logic Symbols Functional Description The ACQ/ACTQ574 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D-type inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock (CP) transition. With the Output Enable (OE) LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops. IEEE/IEC Function Table Inputs Internal Outputs OE CP D Q O Function N HH LNCZ Hold HHH NC Z Hold HL LZ Load HH HZ Load LL LL Data Available LH HH Data Available LHL NC NC No Change in Data LH HNCNC No Change in Data H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance = LOW-to-HIGH Transition NC = No Change Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Figure 1. 1990 Fairchild Semiconductor Corporation www.fairchildsemi.com 74ACQ574, 74ACTQ574 Rev. 1.3 2