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Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.74LCX06 Low Voltage Hex Inverter/Buffer with Open Drain Outputs January 2008 74LCX06 Low Voltage Hex Inverter/Buffer with Open Drain Outputs Features General Description 5V tolerant inputs The LCX06 contains six inverters/buffers. The inputs tol- erate voltages up to 7V allowing the interface of 5V sys- 2.3V3.6V V specifications provided CC tems to 3V systems. 3.7ns t max. (V = 3.3V), 10A I max. PD CC CC Power down high impedance inputs and outputs The outputs of the LCX06 are open drain and can be 24mA output drive (V = 3.0V) connected to other open drain outputs to implement CC Implements proprietary noise/EMI reduction circuitry active LOW wire AND or active HIGH wire OR functions. Latch-up performance exceeds 500mA The 74LCX06 is fabricated with advanced CMOS tech- ESD performance: nology to achieve high speed operation while maintain- Human body model > 2000V ing CMOS low power dissipation. Machine model > 200V Ordering Information Package Order Number Number Package Description 74LCX06M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74LCX06SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74LCX06MTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter X to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. Connection Diagram Logic Symbol IEEE/IEC Pin Description Pin Names Description A , B Inputs n n O Outputs n 1999 Fairchild Semiconductor Corporation www.fairchildsemi.com 74LCX06 Rev. 1.8.0