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This literature is subject to all applicable copyright laws and is not for resale in any manner.74LCX162373 Low Voltage 16-Bit Transparent Latch with 5V Tolerant Inputs and Outputs and 26 Series Resistor February 2001 Revised May 2005 74LCX162373 Low Voltage 16-Bit Transparent Latch with 5V Tolerant Inputs and Outputs and 26 Series Resistor General Description Features The LCX162373 contains sixteen non-inverting latches 5V tolerant inputs and outputs with 3-STATE outputs and is intended for bus oriented 2.3V3.6V V specifications provided CC applications. The device is byte controlled. The flip-flops Equivalent 26: series resistor outputs appear transparent to the data when the Latch Enable (LE) 6.2 ns t max (V 3.3V), 20 PA I max is HIGH. When LE is LOW, the data that meets the setup PD CC CC time is latched. Data appears on the bus when the Output Power down high impedance inputs and outputs Enable (OE) is LOW. When OE is HIGH, the outputs are in Supports live insertion/withdrawal (Note 1) a high impedance state. r12 mA output drive (V 3.0V) CC The LCX162373 is designed for low voltage (2.5V or 3.3V) Implements proprietary noise/EMI reduction circuitry V applications with capability of interfacing to a 5V signal CC environment. The 26: series resistor in the output helps Latch-up performance exceeds 500 mA reduce output overshoot and undershoot. ESD performance: The LCX162373 is fabricated with an advanced CMOS Human body model 2000V technology to achieve high speed operation while maintain- Machine model 200V ing CMOS low power dissipation. Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) (Preliminary) Note 1: To ensure the high-impedance state during power up or down, OE should be tied to V through a pull-up resistor: the minimum value or the CC resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74LCX162373GX BGA54A 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide (Note 2) (Preliminary) TAPE and REEL 74LCX162373MEA MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300 Wide (Note 3) 74LCX162373MTD MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide (Note 3) Note 2: BGA package available in Tape and Reel only. Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter X to the ordering code. Logic Symbol 2005 Fairchild Semiconductor Corporation DS500443 www.fairchildsemi.com