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This cir- The VHC139 is an advanced high speed CMOS Dual 2-to- cuit prevents device destruction due to mismatched supply 4 Decoder/Demultiplexer fabricated with silicon gate and input voltages. CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintain- Features ing the CMOS low power dissipation. High Speed: t = 5.0 ns (typ) at T = 25C The active LOW enable input can be used for gating or it PD A can be used as a data input for demultiplexing applications. Low power dissipation: I = 4 A (Max.) at T = 25C CC A When the enable input is held HIGH, all four outputs are High noise immunity: V = V = 28% V (Min.) NIH NIL CC fixed at a HIGH logic level independent of the other inputs. Power down protection is provided on all inputs An input protection circuit ensures that 0V to 7V can be applied to the input pins without regard to the supply volt- Pin and function compatible with 74HC139 Ordering Code: Order Number Package Number Package Description 74VHC139M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74VHC139SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC139MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 74VHC139N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter X to the ordering code. Connection Diagram Pin Description Pin Names Description A , A Address Inputs 0 1 E Enable Inputs O O Outputs 0 3 Truth Table Inputs Outputs E A A O O O O 0 1 0 1 2 3 H X X HHHH L LLL H H H L H LH LH H L L HHH L H L HHHHH L H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial 1999 Fairchild Semiconductor Corporation DS011521.prf www.fairchildsemi.com