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This literature is subject to all applicable copyright laws and is not for resale in any manner.74VHC157 Quad 2-Input Multiplexer May 2007 74VHC157 tm Quad 2-Input Multiplexer Features General Description High Speed: t = 4.1ns (Typ.) at V = 5V The VHC157 is an advanced high speed CMOS Quad PD CC 2-Channel Multiplexer fabricated with silicon gate CMOS Low power dissipation: I = 4A (Max.) at T = 25C CC A technology. It achieves the high speed operation similar High noise immunity: V = V = 28% V (Min.) NIH NIL CC to equivalent Bipolar Schottky TTL while maintaining the Power down protection is provided on all inputs CMOS low power dissipation. Low noise: V = 0.8V (Max.) OLP It consists of four 2-input digital multiplexers with com- Pin and function compatible with 74HC157 mon select and enable inputs. When the ENABLE input is held H level, selection of data is inhibited and all the outputs become L level. The SELECT decoding deter- mines whether the I or I inputs get routed to their cor- 0x 1x responding outputs. An Input protection circuit ensures that 0V to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and on two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. Ordering Information Package Order Number Number Package Description 74VHC157M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow 74VHC157SJ M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHC157MTC MTC16 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter X to the ordering number. Connection Diagram Pin Description Pin Names Description I I Source 0 Data Inputs 0a 0d I Source 1 Data Inputs I 1a 1d E Enable Input S Select Input Z Z Outputs a d 1992 Fairchild Semiconductor Corporation www.fairchildsemi.com 74VHC157 Rev. 1.2