ADP3110AKCPZ-RL ON Semiconductor

ADP3110A Dual Bootstrapped, 12 V MOSFET Driver with Output Disable The ADP3110A is a single Phase 12 V MOSFET gate drivers optimized to drive the gates of both highside and lowside power ADP3110A 3 OD V TSD CC 1 BST UVLO DRVH 2 8 IN FALLING EDGE MONITOR DELAY 7 SWN FALLING EDGE MONITOR DELAY START STOP NON OVERLAP 4 V CC MIN DRVL TIMERS OFF TIMER 5 DRVL 6 PGND Figure 1. Block Diagram PIN DESCRIPTION SO8 DFN8 Symbol Description 1 1 BST Upper MOSFET Floating Bootstrap Supply. A capacitor connected between BST and SW pins holds this bootstrap voltage for the highside MOSFET as it is switched. The recommended capacitor value is between 100 nF and 1.0 F. An external diode is required with the ADP3110A. 2 2 IN LogicLevel Input. This pin has primary control of the drive outputs. 3 3 OD Output Disable. When low, normal operation is disabled forcing DRVH and DRVL low. 4 4 V Input Supply. A 1.0 F ceramic capacitor should be connected from this pin to PGND. CC 5 5 DRVL Output drive for the lower MOSFET. 6 6 PGND Power Ground. Should be closely connected to the source of the lower MOSFET. 7 7 SWN Switch Node. Connect to the source of the upper MOSFET. 8 8 DRVH Output drive for the upper MOSFET.