AP1302CSSL00SMGAH-GEVB AP1302CS Evaluation Board User s Manual www.onsemi.com Evaluation Board Overview EVAL BOARD USERS MANUAL The evaluation boards are designed to demonstrate the features of image sensors products from ON Semiconductor. This headboard is intended to plug directly into the Demo 3 system. Test points and jumpers on the board provide access to the clock, I/Os, and other miscellaneous signals. Features Clock Input Default 27 MHz Crystal Oscillator Optional Demo 3 Controlled MClk Two Wire Serial Interface Selectable Base Address Parallel Interface MIPI Interface ROHS Compliant Figure 1. AP1302CS Evaluation Board Block Diagram SPI FLASH PRIMARY SENSOR MIPI ICP3 is Master S0 CLK, S0 D0, S0 D1, S0 D2 GPIO 11:0 SECONDARY SENSOR MIPI STAND BY S1 CLK, S1 D0, S1 D1 MCLK AP1302 HOST MIPI MUX SENSOR MIPI (ICP3) H CLK, H D0, H D1, H D2, H D3 S01 D32 SPI (Host is Master) 2 2 HOST I C SECONDARY I C MASTER Push 2 PRIMARY I C MASTER RESET FROM HOST RESET Button Reset 2 I C Select Jumpers +1V2 +1V8HEADB +1V8 SELECT POWER +5V 0R DISABLED Power Regulators Power Supplies (+3.3 V, +2.8 V, + 1.8 V HEADB, +1.2 V) Power IOVDD HMTSC (+1.8 V HEADB) First then JACK after 200 s the Reset of IOVDD Figure 2. Block Diagram of AP1302CSSL00SMGAH GEVB Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: November, 2015 Rev. 0 EVBUM2331/D Host Connector DEMO3 or DEMO2x (with Adapter) Level Trans. Sensor ConnectorAP1302CSSL00SMGAHGEVB Top View RESET Switch SW1 CLK SELECT P3 PRI I2C SCL P6 VBLOW P15 PRI I2C SDA P5 +5V0 Select P1 SPI LS EN P24 SPI Debug P23 2 I C Debug P4 SEC I2C SCL P12 SEC I2C SDA P13 +1V8S P8 +VDDIO HB0 SENSE P14 +1V2S P7 +VDDIO HB1 SENSE P17 I2C ID Select P10 +VDDIO HEAD Select P16 Headboard Connector P11 Figure 3. Top View of the Board Default Jumpers Bottom View Baseboard Connector J1 +HEADB 1V8S P9 Figure 4. Bottom View of the Board Connectors www.onsemi.com 2