FAN2560 350mA Low-V LDO with Fast Transient Response IN August 2009 FAN2560 350mA Low-V LDO with Fast Transient Response IN Features Description The FAN2560 is a linear low-dropout (LDO) regulator 55A Typical Quiescent Current with a split-supply architecture. Separate bias and Up to 350mA Output Current supply inputs allow bias to be taken directly from the battery, while the input is taken from a lower pre- 2.9V to 5.5V Bias Supply Voltage regulated source. This allows a smaller differential V +0.1V to 5.5V Power Input Supply Voltage OUT voltage between input and output, which provides greater efficiency over a wider V range. BAT Fixed Voltage Options: 1.3V and 1.5V The FAN2560 is available in a fixed-voltage output, Thermal Shutdown Protection (TSD) 5-bump, WLCSP package. Input Under-Voltage Lockout (UVLO) Short-Circuit Current Protection (SCP) 5-bump 0.96 x 1.33mm WLCSP Applications Moderate Current Digital Loads DVB-H, DMB Processors Handsets, Smart Phones WLAN DC-DC Converter Modules PDA, DSC, PMP, and MP3 Players Portable Hard Disk Drives Typical Applications VBAT VBAT 2.9 to 5.5V VIN VIN 2.9 to 5.5V V +0.3V OUT VOUT VOUT C IN C IN FAN2560 FAN2560 C OUT 1F C 1 F GND OUT GND 2.2 F 2.2F EN EN Figure 1. Separate Supply and Bias Line Figure 2. Connected Supply and Bias Line Ordering Information Operating Part Number Package Packing Method Eco Status Temperature Range FAN2560UC13X -40C to 85C WLCSP-5 0.96 x 1.33mm Green Tape and Reel FAN2560UC15X -40C to 85C WLCSP-5 0.96 x 1.33mm Green Tape and Reel For Fairchilds definition of Eco Status, please visit: FAN2560 350mA Low-V LDO with Fast Transient Response IN Block Diagram Figure 3. IC Block Diagram Pin Configuration A1 A3 A3 A1 VIN VOUT VOUT VIN GND B2 B2 GND C1 C3 C3 C1 VBAT EN EN VBAT TOP VIEW BOTTOM VIEW Figure 4. 0.96 x 1.33mm WLCSP package Pin Definitions Pin Name Description A1 VIN Power supply input. A minimum 1F MLCC is required to GND. Output Voltage. A typical C =1F to 2.2F MLCC is required to GND, placed close to the OUT A3 VOUT V terminal. OUT Battery bias supply input. No capacitor is required unless another bulk capacitor is more than C1 VBAT few inches away. Enable input. The device is in shutdown mode when the voltage at this pin is <0.4V and C3 EN enabled when >1.1V. The EN latches the LOW logic state once externally forced. Do not leave this pin floating when the device is turned ON. B2 GND Ground pin. Connect to a PCB GND plane. 2006 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN2560 Rev. 1.0.1 2