TinyBuck Regulator, Digitally Programmable, 5 A, 2.4 MHz FAN53200 Descriptions www.onsemi.com The FAN53200 is a stepdown switching voltage regulator that delivers a digitally programmable output from an input voltage supply 2 of 2.5 V to 5.5 V. The output voltage is programmed through an I C interface capable of operating up to 3.4 Mbps. Using a proprietary architecture with synchronous rectification, the 1 FAN53200 is capable of delivering 5 A continuously at over 80% WLCSP20 efficiency, while maintaining over 80% efficiency at load currents as CASE 567SH low as 10 mA. The regulator operates at a nominal fixed frequency of 2.4 MHz, which reduces the value of the external components. VIN Additional output capacitance can be added to improve regulation C IN during load transients without affecting stability. Inductance up to EN 1.2 H may be used with additional output capacitance. VOUT SDA At moderate and light loads, Pulse Frequency Modulation (PFM) is L1 SW SCL FAN53200 VDD used to operate in PowerSave Mode with a typical quiescent current C OUT VSEL Core GND of 60 A. At higher loads, the system automatically switches to Processor (System Load) AGND fixedfrequency control, operating at 2.4 MHz. In Shutdown Mode, GND the supply current drops to 0.1 A, reducing power consumption. PFM Mode can be disabled if constant frequency is desired. The FAN53200 Figure 1. Typical Application is available in a 20bump, 1.6 x 2.0 mm, WLCSP. Features Quiescent Current in PFM Mode: 60 A (Typical) Input UnderVoltage Lockout (UVLO) Digitally Programmable Output Voltage: Thermal Shutdown and Overload Protection 0.6 1.3875 V in 12.5 mV Steps 20Bump WaferLevel Chip Scale Package (WLCSP) BestinClass Load Transient Applications Continuous Output Current Capability: 5 A Graphic, and DSP Processors 2.5 V to 5.5 V Input Voltage Range ARM , Krait , OMAP , NovaThor , ARMADA Programmable Slew Rate for Voltage Transitions Hard Disk Drives FixedFrequency Operation: 2.4 MHz Tablets, Netbooks, UltraMobile PCs 2 I CCompatible Interface Up to 3.4 Mbps Smart Phones Internal SoftStart Gaming Devices ORDERING INFORMATION PowerUp Defaults 2 I C Slave Device Part Number VSEL0 VSEL1 Address Device ID Marking Package FAN53200UC35X OFF 1.15 V C0 0000 B9 WLCSP20 FAN53200UC44X 1.15V 0.85 V C0 0000 CD WLCSP20 Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: May, 2020 Rev. 3 FAN53200/DFAN53200 Pin Configuration Figure 2. Pin Assignment (Top View) Table 1. PIN DESCRIPTIONS Pin Name Description A1 VSEL Voltage Select. When this pin is LOW, V is set by the VSEL0 register. When this pin is HIGH, V is set by OUT OUT the VSEL1 register. A2 EN Enable. The device is in Shutdown Mode when this pin is LOW. All registers go to default values when EN pin is LOW. 2 A3 SCL I C Serial Clock A4 VOUT VOUT. Sense pin for VOUT. Connect to C . OUT 2 B1 SDA I C Serial Data B2, B3, GND Ground. Lowside MOSFET is referenced to this pin. C and C should be returned with a minimal path to IN OUT C1 C4 these pins. B4 AGND Analog Ground. All signals are referenced to this pin. Avoid routing high dV/dt AC currents through this pin. D1, D2, VIN Power Input Voltage. Connect to the input power source. Connect to C with minimal path. IN E1, E2 D3, D4, SW Switching Node. Connect to the inductor. E3, E4 www.onsemi.com 2