FDMS9410 F085 N-Channel PowerTrench MOSFET August 2015 FDMS9410 F085 N-Channel PowerTrench MOSFET 40 V, 50 A, 4.4 m Features Typical R = 3.7 m at V = 10V, I = 50 A DS(on) GS D Typical Q = 24 nC at V = 10V, I = 50 A g(tot) GS D UIS Capability RoHS Compliant Qualified to AEC Q101 Applications Automotive Engine Control PowerTrain Management Solenoid and Motor Drivers Electronic Steering Forcurrentpackagedrawing,pleaserefertotheFairchildweb Integrated Starter/Alternator siteat FDMS9410 F085 N-Channel PowerTrench MOSFET Electrical Characteristics T = 25C unless otherwise noted. J Symbol Parameter Test Conditions Min. Typ. Max. Units Off Characteristics B Drain-to-Source Breakdown Voltage I = 250A, V = 0V 40 - - V VDSS D GS o V = 40V, T = 25 C - - 1 A DS J I Drain-to-Source Leakage Current DSS o V = 0V T = 175 C (Note 4) - - 1 mA GS J I Gate-to-Source Leakage Current V = 20V - - 100 nA GSS GS On Characteristics V Gate to Source Threshold Voltage V = V , I = 250A 2.0 3.2 4.0 V GS(th) GS DS D o T = 25 C - 3.7 4.4 m I = 50A, J D R Drain to Source On Resistance DS(on) o V = 10V T = 175 C (Note 4) - 6.6 7.9 m GS J Dynamic Characteristics C Input Capacitance - 1790 - pF iss V = 20V, V = 0V, DS GS C Output Capacitance - 620 - pF oss f = 1MHz C Reverse Transfer Capacitance - 32 - pF rss R Gate Resistance f = 1MHz - 2.0 - g Q Total Gate Charge V = 0 to 10V -24 36 nC g(ToT) GS V = 32V DD Q Threshold Gate Charge V = 0 to 2V - 3.3 - nC I = 50A g(th) GS D Q Gate-to-Source Gate Charge -9.1 - nC gs Q Gate-to-Drain Miller Charge - 4.5 - nC gd Switching Characteristics t Turn-On Time - - 27 ns on t Turn-On Delay - 12.1 - ns d(on) t Rise Time - 5.9 - ns V = 20V, I = 50A, r DD D V = 10V, R = 6 t Turn-Off Delay - 18.8 - ns GS GEN d(off) t Fall Time - 5.0 - ns f t Turn-Off Time - - 31 ns off Drain-Source Diode Characteristics I =50A, V = 0V - - 1.25 V SD GS V Source-to-Drain Diode Voltage SD I = 25A, V = 0V - - 1.2 V SD GS t Reverse-Recovery Time - 45.5 59 ns I = 50A, dI /dt = 100A/s rr F SD V = 32V Q Reverse-Recovery Charge - 33.2 43 nC DD rr Note: 4: The maximum value is specified by design at T = 175C. Product is not tested to this condition in production. J 2015 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com FDMS9410 F085 Rev. 1.0