FAN25800 500 mA, Low-I , Low-Noise, LDO Regulator Q GND April 2014 FAN25800 500 mA, Low-I , Low-Noise, LDO Regulator Q Features Description V : 2.3 V to 5.5 V IN The FAN25800 is a linear low-dropout regulator with a high PSRR (85 dB at 100 Hz) and low output noise V = 3.3 V (I Max. = 500 mA) OUT OUT (typically 14.1 V over a 10 Hz to 100 kHz RMS V = 5.14 V (I Max. = 250 mA) bandwidth). The LDO can provide up to 250 mA of OUT OUT output current for 5.14 V output and up to 500 mA of Output Noise Density at 250 mA and output current for 3.3 V output. 10 kHz = 19 nV/Hz (Integrated 8 Vrms) The enable control pin can be used to shut down the Low I of 14 A in Regulation and Low-I Dropout Q Q device and disconnect the output load from the input. Mode with Optimized Dropout Transitions During shutdown, the supply current drops below 1 A. <70 mV Dropout Voltage at 250 mA Load The FAN25800 is designed to be stable with space- Controlled Soft-Start to Reduce Inrush Current saving ceramic capacitors as small as 0201 case size. The FAN25800 is available in a 4-bump, 0.35 mm pitch, Thermal Shutdown Protection (TSD) WLCSP package. Input Under-Voltage Lockout (UVLO) Short-Circuit Protection (SCP) VIN Stable with Two 1.5 F, 0201 Ceramic Capacitors at VOUT 1.5F FAN25800 VOUT 4-Ball WLCSP, 0.65 mm x 0.65 mm, 0.35 mm 1.5F 1.5F Pitch, Plated Solder, 330 m Maximum Thickness EN Applications WiFi Modules PDA Handsets Figure 1. Typical Application Smart Phones, Tablets, Portable Devices Ordering Information Packing Part Number V I Max. Operating Temperature Package OUT OUT Method FAN25800AUC33X 3.3 V 500 mA 4-Bump, WLCSP, -40C to 85C 0.65 x 0.65 mm, Tape & Reel FAN25801AUC514X 5.14 V 250 mA 0.35 mm Pitch 2014 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN25800 Rev. 1.0.1 FAN25800 500 mA, Low-I , Low-Noise, LDO Regulator Q Block Diagram VIN VOUT C IN C OUT FILTER V REF EN GND Figure 2. IC and System Block Diagram Table 1. Recommended External Components Component Description Vendor Parameter Typ. Unit (1) C 1.5 F, 6.3 V, X5R, 0201 Murata GRM033R60J155M 1.5 F IN (1) C 2x1.5 F, 6.3 V, X5R, 0201 Murata GRM033R60J155M C 1.5 F OUT (2) (1) C 1.0 F, 6.3 V, X5R, 0201 Murata GRM033R60J105M 1.0 F Alternative Notes: 1. Capacitance value does not reflect effects of bias, tolerance, and temperature. See Recommended Operating Conditions and Operation Description sections for more information. 2. C can be used for both C and C . FAN25800 is stable with one 1 F at C and one 1 F at C . Alternative IN OUT IN OUT Pin Configuration A1 A2 VOUT VOUT A2 A1 VIN VIN B1 B2 GND B2 B1 EN EN GND Figure 3. Top-Through View Figure 4. Bottom View Pin Definitions Pin Name Description A1 VIN Input Voltage. Connect to input power source and C . IN A2 VOUT Output Voltage. Connect to C and load. OUT Enable. The device is in Shutdown Mode when this pin is LOW. No internal pull-down. B1 EN (3) Do not leave this pin floating. Recommended to not tie EN pin directly to VIN. B2 GND Ground. Power and IC ground. All signals are referenced to this pin. Note: 3. Recommended to use logic voltage of 1.8 V to drive the EN pin. 2014 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN25800 Rev. 1.0.1 2 Q1