OrdeOrdeOrdering numbering numbering numberr : ENA0970B : ENA0970Br : ENA1951 LC87F2H08A CMOS IC 8K-byte FROM and 256-byte RAM integrated LC87F2H08A Minimum Instruction Cycle Time 250ns (12MHz at V =2.7V to 5.5V) DD 300ns (10MHz at V =2.2V to 5.5V) DD 750ns (4MHz at V =1.8V to 5.5V) DD Ports Normal withstand voltage I/O ports Ports whose I/O direction can be designated in 1-bit units 16 (Pin, P20, P21, P30, P31, P70 to P73) Ports whose I/O direction can be designated in 4-bit units 8 (P0n) Dedicated oscillator ports/input ports 2 (CF1/XT1, CF2/XT2) Reset pin 1 ( ) RES Power pins 3 (V 1, V 2, V 1) SS SS DD Timers Timer 0: 16-bit timer/counter with a capture register. Mode 0: 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register) 2 channels Mode 1: 8-bit timer with an 8-bit programmable prescaler (with an 8-bit capture register) + 8-bit counter (with an 8-bit capture register) Mode 2: 16-bit timer with an 8-bit programmable prescaler (with a 16-bit capture register) Mode 3: 16-bit counter (with a 16-bit capture register) Timer 1: 16-bit timer/counter that supports PWM/toggle outputs Mode 0: 8-bit timer with an 8-bit prescaler (with toggle outputs) + 8-bit timer/ counter with an 8-bit prescaler (with toggle outputs) Mode 1: 8-bit PWM with an 8-bit prescaler 2 channels Mode 2: 16-bit timer/counter with an 8-bit prescaler (with toggle outputs) (toggle outputs also possible from the lower-order 8 bits) Mode 3: 16-bit timer with an 8-bit prescaler (with toggle outputs) (The lower-order 8 bits can be used as PWM) Timer 6: 8-bit timer with a 6-bit prescaler (with toggle outputs) Timer 7: 8-bit timer with a 6-bit prescaler (with toggle outputs) Base timer 1) The clock is selectable from the subclock (32.768kHz crystal oscillation), system clock, and timer 0 prescaler output. 2) Interrupts are programmable in 5 different time schemes High-Speed Clock Counter Can count clocks with a maximum clock rate of 20MHz (at a main clock of 10MHz). Can generate output real time. SIO SIO0: 8-bit Synchronous serial interface 1) LSB first/MSB first mode selectable 2) transfer clock cycle=4/3tCYC) Built-in 8-bit baudrate generator (maximum SIO1: 8-bit asynchronous/synchronous serial interface Mode 0: Synchronous 8-bit serial I/O (2- or 3-wire configuration, 2 to 512 tCYC transfer clocks) Mode 1: Asynchronous serial I/O (half-duplex, 8 data bits, 1 stop bit, 8 to 2048 tCYC baudrates) Mode 2: Bus mode 1 (start bit, 8 data bits, 2 to 512 tCYC transfer clocks) Mode 3: Bus mode 2 (start detect, 8 data bits, stop detect) UART Full Duplex 7/8/9 bit data bits selectable 1 Stop bit (2 bits in continuous data transmission) Built-in baudrate generator AD Converter: 12 bits/8 bits 9 channels 12/8 bits AD converter resolution selectable No.A0970-2/27