MC14046B Phase Locked Loop The MC14046B phase locked loop contains two phase comparators, a voltage controlled oscillator (VCO), source follower, and zener diode. The comparators have two common signal inputs, PCA and in PCB . Input PCA can be used directly coupled to large voltage in in signals, or indirectly coupled (with a series capacitor) to small voltage MC14046B BLOCK DIAGRAM PIN ASSIGNMENT LD 1 16 V SELF BIAS PHASE DD PCA 14 2 PC1 in out CIRCUIT COMPARATOR 1 PC1 2 15 ZENER out PHASE 13 PC2 out PCB 3 14 PCA in in PCB 3 COMPARATOR 2 1 LD in VCO 4 13 PC2 4 VCO out out out VOLTAGE VCO 9 in 11 R1 CONTROLLED INH 5 12 R2 12 R2 OSCILLATOR V = PIN 16 DD 6 C1 A C1 6 11 R1 A (VCO) 7 C1 V = PIN 8 B SS C1 7 10 SF B out SOURCE FOLLOWER 10 SF out INH 5 V 8 9 VCO SS in V 15 ZENER SS ELECTRICAL CHARACTERISTICS (Voltages Referenced to V ) SS 55 C 25 C 125 C V DD Vdc Min Max Min Typ Max Min Max Characteristic Symbol Unit Output Voltage 0 Level V 5.0 0.05 0 0.05 0.05 Vdc OL V = V or 0 10 0.05 0 0.05 0.05 in DD 15 0.05 0 0.05 0.05 V 5.0 4.95 4.95 5.0 4.95 Vdc 1 Level OH 10 9.95 9.95 10 9.95 V = 0 or V in DD 15 14.95 14.95 15 14.95 Input Voltage (Note 2) 0 Level V Vdc IL (V = 4.5 or 0.5 Vdc) 5.0 1.5 2.25 1.5 1.5 O (V = 9.0 or 1.0 Vdc) 10 3.0 4.50 3.0 3.0 O (V = 13.5 or 1.5 Vdc) 15 4.0 6.75 4.0 4.0 O V 5.0 3.5 3.5 2.75 3.5 Vdc (V = 0.5 or 4.5 Vdc) 1 Level IH O 10 7.0 7.0 5.50 7.0 (V = 1.0 or 9.0 Vdc) O 15 11 11 8.25 11 (V = 1.5 or 13.5 Vdc) O Output Drive Current I mAdc OH (V = 2.5 Vdc) Source 5.0 1.2 1.0 1.7 0.7 OH (V = 4.6 Vdc) 5.0 0.25 0.2 0.36 0.14 OH (V = 9.5 Vdc) 10 0.62 0.5 0.9 0.35 OH (V = 13.5 Vdc) 15 1.8 1.5 3.5 1.1 OH I 5.00.64 0.51 0.88 0.36 mAdc (V = 0.4 Vdc) Sink OL OL 10 1.6 1.3 2.25 0.9 (V = 0.5 Vdc) OL 15 4.2 3.4 8.8 2.4 (V = 1.5 Vdc) OL Input Current I 15 0.1 0.00001 0.1 1.0 Adc in Input Capacitance C 5.0 7.5 pF in Quiescent Current I 5.0 5.0 0.005 5.0 150 Adc DD 10 10 0.010 10 300 (Per Package) Inh = PCA = V , in DD 15 20 0.015 20 600 Zener = VCO = 0 V, PCB = V in in DD or 0 V, I = 0 A out Total Supply Current (Note 3) I 5.0 mAdc I = (1.46 A/kHz) f + I T T DD (Inh = 0, f = 10 kHz, C = 50 pF, 10 I = (2.91 A/kHz) f + I o L T DD R1 = 1.0 M , R2 = R = , 15 I = (4.37 A/kHz) f + I SF T DD and 50% Duty Cycle) 2. Noise immunity specified for worstcase input combination. Noise Margin for both 1 and 0 level = 1.0 Vdc min V = 5.0 Vdc DD 2.0 Vdc min V = 10 Vdc DD 2.5 Vdc min V = 15 Vdc DD 3. To Calculate Total Current in General: 3/4 3/4 VCO 1.65 V 1.35 VCO 1.65 in DD in 3 I 2.2 x V + + 1.6 x + 1 x 10 (C + 9) V f + T DD L DD R1 R2 R SF 100% Duty Cycle of PCA in 1 2 1 x 10 V + I where: I in A, C in pF, VCO , V in Vdc, f in kHz, and DD Q T L in DD 100 R1, R2, R in M , C on VCO . SF L out