NB2304A 3.3 V Zero Delay Clock Buffer The NB2304A is a versatile, 3.3 V zero delay buffer designed to distribute high--speed clocks in PC, workstation, datacom, telecom and other high--performance applications. It is available in an 8 pin package. The part has an on--chip PLL which locks to an input clock NB2304A FBK CLKA1 PLL REF CLKA2 2 Extra Divider (--2) CLKB1 CLKB2 Figure1.BasicBlockDiagram (see Figures 11 and 12 for device specific Block Diagrams) Table1.CONFIGURATIONS Device FeedbackFrom BankAFrequency BankBFrequency NB2304AI1 Bank A or Bank B Reference Reference NB2304AI1H Bank A or Bank B Reference Reference NB2304AI2 Bank A Reference Reference 2 NB2304AI2 Bank B 2 X Reference Reference Table2.PINDESCRIPTION 1 8 REF FBK Pin PinName Description 1 REF (Note 1) Input reference frequency, 5 V CLKA1 2 7 V DD tolerant input. NB2304A 2 CLKA1 (Note 2) Buffered clock output, Bank A. CLKA2 3 6 CLKB2 3 CLKA2 (Note 2) Buffered clock output, Bank A. 4 GND Ground. GND 4 5 CLKB1 5 CLKB1 (Note 2) Buffered clock output, Bank B. 6 CLKB2 (Note 2) Buffered clock output, Bank B. Figure2.PinConfiguration 7 V 3.3 V supply. DD 8 FBK PLL feedback input. 1. Weak pulldown. 2. Weak pulldown on all outputs.