MUN5336DW1, NSBC115EPDXV6 Complementary Bias Resistor Transistors R1 = 100 k , R2 = 100 k www.onsemi.com NPN and PNP Transistors with Monolithic Bias Resistor Network PIN CONNECTIONS This series of digital transistors is designed to replace a single (3) (2) (1) device and its external resistor bias network. The Bias Resistor Transistor (BRT) contains a single transistor with a monolithic bias R 1 network consisting of two resistors a series base resistor and a R 2 base-emitter resistor. The BRT eliminates these individual Q 1 components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. Q 2 R 2 Features R 1 Simplifies Circuit Design Reduces Board Space (4) (5) (6) Reduces Component Count NSV Prefix for Automotive and Other Applications Requiring MARKING DIAGRAMS Unique Site and Control Change Requirements AECQ101 Qualified and PPAP Capable 6 These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS SOT363 36 M Compliant CASE 419B MAXIMUM RATINGS 1 (T = 25C both polarities Q (PNP) & Q (NPN), unless otherwise noted) A 1 2 36 = Specific Device Code Rating Symbol Max Unit M = Date Code* Collector-Base Voltage V 50 Vdc CBO = Pb-Free Package Collector-Emitter Voltage V 50 Vdc CEO (Note: Microdot may be in either location) Collector Current Continuous I 100 mAdc *Date Code orientation may vary depending up- C on manufacturing location. Input Forward Voltage V 40 Vdc IN(fwd) Input Reverse Voltage V 10 Vdc IN(rev) Stresses exceeding those listed in the Maximum Ratings table may damage the SOT563 device. If any of these limits are exceeded, device functionality should not be 36 M 6 CASE 463A assumed, damage may occur and reliability may be affected. 1 1 ORDERING INFORMATION 36 = Specific Device Code Device Package Shipping M = Month Code MUN5336DW1T1G, SOT363 3,000 / Tape & Reel = PbFree Package NSVMUN5336DW1T1G* NSBC115EPDXV6T1G, SOT563 4,000 / Tape & Reel NSVBC115EPDXV6T1G* For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This document contains information on some products that are still under development. ON Semiconductor reserves the right to change or discontinue these products without notice. Semiconductor Components Industries, LLC, 2014 1 Publication Order Number: October, 2017 Rev. 1 DTC115EP/DMUN5336DW1, NSBC115EPDXV6 THERMAL CHARACTERISTICS Characteristic Symbol Max Unit MUN5336DW1 (SOT363) ONE JUNCTION HEATED Total Device Dissipation P D T = 25C (Note 1) 187 mW A (Note 2) 256 Derate above 25C (Note 1) 1.5 mW/C (Note 2) 2.0 Thermal Resistance, (Note 1) R 670 C/W JA Junction to Ambient (Note 2) 490 MUN5336DW1 (SOT363) BOTH JUNCTION HEATED (Note 3) Total Device Dissipation P D T = 25C (Note 1) 250 mW A (Note 2) 385 Derate above 25C (Note 1) 2.0 mW/C (Note 2) 3.0 Thermal Resistance, R C/W JA Junction to Ambient (Note 1) 493 (Note 2) 325 Thermal Resistance, R C/W JL Junction to Lead (Note 1) 188 (Note 2) 208 Junction and Storage Temperature Range T , T 55 to +150 C J stg NSBC115EPDXV6 (SOT563) ONE JUNCTION HEATED Total Device Dissipation P D T = 25C (Note 1) 357 mW A Derate above 25C (Note 1) 2.9 mW/C Thermal Resistance, R C/W JA Junction to Ambient (Note 1) 350 NSBC115EPDXV6 (SOT563) BOTH JUNCTION HEATED (Note 3) Total Device Dissipation P D T = 25C (Note 1) 500 mW A Derate above 25C (Note 1) 4.0 mW/C Thermal Resistance, R C/W JA Junction to Ambient (Note 1) 250 Junction and Storage Temperature Range T , T 55 to +150 C J stg 1. FR4 Minimum Pad. 2. FR4 1.0 1.0 Inch Pad. 3. Both junction heated values assume total power is sum of two equally powered channels. www.onsemi.com 2