NB4L339MNGEVB ON Semiconductor

NB4L339MNGEVB NB4L339MNGEVB Evaluation Board User s Manual NB4L339MNGEVB Top View Bottom View Figure 1. NB4L339MNGEVB Evaluation Board Lab Setup for Time Domain Measurements Table 1. Basic Lab Equipment Description Example Equipment Qty Power Supply with 4 outputs HP6624A 1 Oscilloscope and/or Frequency counter TDS8000 with 80E01 Sampling Head 1 Differential Signal Generator Agilent 8133A, Advantest D3186 1 Matched High Speed Cables with SMA Connectors Storm, Semflex 6 Pair Digital Voltmeter, Power supply cables 1. SMAGND (V ) is the termination supply for the LVPECL outputs Lab Setup TT only, not to be confused with the device ground pin (V ). EE A typical lab setup for taking time domain measurements in differential mode operation is shown in Figure 2. The Step 2: Connect Inputs following steps should be followed for proper equipment For Differential Mode: setup: Connect the differential output of the signal generator to the differential input of the device (CLKx and CLKx). The Step 1: Connect Power differential clock inputs of the NB4L339 incorporate Three power levels must be provided to the board, V , CC internal 50 termination resistors. V , and SMAGND via the banana jack connectors on the EE For SingleEnded Mode: bottom of the board. Bypass capacitors are installed from Connect the singleended output of the generator to the V to SMAGND and V to SMAGND at the banana jacks CC EE CLKx input of the device. Vth must be applied to the and the deivce pins. Using the split power supply mode, complementary input (CLKx) when operating in GND = V = V 2.0 V. The exposed pad of the QFN32 TT CC singleended mode. Refer to the device datasheet for details package is connected to V . EE on singleended operation. Table 2. NB4L339 Power Supply Connections The VTA and VTB termination pins each have a trace from package pin to a node where it can be connected to 3.3 V Setup 2.5 V Setup either VCC, VEE or SMAGND, depending on the users V = 2.0 V V = 2.0 V CC CC need. V = SMAGND = 0 V V = SMAGND = 0 V TT TT NOTE: Inputs CLKA/B and CLKA/CLKB must be V = 1.3 V V = 0.5 V signal driven or auto oscillation may result. EE EE