NBC12429, NBC12429A 3.3V/5VProgrammable PLL Synthesized Clock Generator 25 MHz to 400 MHz NBC12429, NBC12429A +3.3 or 5.0 V 1 1 MHz F REF PLL V CC with 16 MHz Crystal PHASE 16 DETECTOR +3.3 or 5.0 V VCO V 21, 25 CC 4 XTAL1 24 F 9BIT M N OUT 10 20 MHz OSC 23 COUNTER (1, 2, 4, 8) F OUT 200 400 5 XTAL2 MHz 20 TEST 6 OE LATCH LATCH 28 S LOAD LATCH 7 P LOAD 01 01 27 S DATA 2BIT SR 3BIT SR 9BIT SR 26 S CLOCK 8 16 17, 18 22, 19 9 2 M 8:0 N 1:0 Figure 1. Block Diagram (PLCC28) Table 1. Output Division Table 2. XTAL SEL and OE N 1:0 Output Division Input 0 1 00 1 OE Outputs Disabled Outputs Enabled 01 2 10 4 11 8