TinyLogic UHS Dual Buffer with 3-STATE Outputs NC7WZ241 Description The NC7WZ241 is a Dual NonInverting Buffer with 3STATE outputs. The output enable circuitry is organized as active LOW for www.onsemi.com one buffer and active HIGH for the other buffer, thus facilitating transceiver operation. MARKING The Ultra High Speed device is fabricated with advanced CMOS DIAGRAMS technology to achieve superior switching performance with high output drive while maintaining low static power dissipation over a UQFN8 T7KK broad V operating range. The device is specified to operate over the CC 1.6X1.6, 0.5P XYZ 1.65 V to 5.5 V V operating range. The inputs and outputs are high CC CASE 523AY impedance when V is 0 V. Inputs tolerate voltages up to 5.5 V CC independent of V operating range. Outputs tolerate voltages above CC V when in the 3STATE condition. CC Features WZ41 US8 Space Saving US8 Surface Mount Package ALYW CASE 846AN MicroPak PbFree Leadless Package Ultra High Speed: t 2.6 ns Typ. into 50 pF at 5 V V PD CC High Output Drive: 24 mA at 3 V V CC Broad V Operating Range: 1.65 V to 5.5 V T7, WZ41 = Specific Device Code CC KK = 2Digit Lot Run Traceability Code Matches the Performance of LCX when Operated at 3.3 V V CC XY = 2Digit Date Code Format Power Down High Impedance Inputs / Outputs Z = Assembly Plant Code A = Assembly Site Overvoltage Tolerant Inputs Facilitate 5 V to 3 V Translation L = Wafer Lot Number Outputs are Overvoltage Tolerant in 3STATE Mode YW = Assembly Start Week Patented Noise / EMI Reduction Circuitry Implemented These Devices are PbFree, Halogen Free/BFR Free and are RoHS ORDERING INFORMATION Compliant See detailed ordering, marking and shipping information in the package dimensions section on page 6 of this data sheet. IEEE/IEC A 1 1 Y 1 OE EN A 2 1 Y 2 OE EN Figure 1. Logic Symbol Semiconductor Components Industries, LLC, 2005 1 Publication Order Number: October, 2020 Rev. 2 NC7WZ241/DNC7WZ241 Connection Diagrams OE A Y 1 2 7 6 5 OE 1 8 V CC A 2 7 OE 1 V 8 4 GND CC Y 3 6 Y 2 1 1 2 3 GND45 A 2 OE Y A 1 2 Figure 2. Pin Assignments for US8 Figure 4. Pad Assignments for MicroPak (Top View) (Top Thru View) (Top View) AAA Pin One AAA represents Product Code Top Mark see ordering code NOTE: Orientation of Top Mark determines Pin One location. Read the top product code mark left to right, Pin One is the lower left pin (see diagram). Figure 3. Pin One Orientation Diagram PIN DESCRIPTIONS FUNCTION TABLE Pin Names Description Inputs Output OE, OE Enable Inputs for 3STATE Outputs OE or OE A Y Y n 1 2 A Inputs L L L Z n Y 3STATE Outputs L H H Z n H L Z L H H Z H H = HIGH Logic Level L = LOW Logic Level Z = 3STATE www.onsemi.com 2