NCL30088LED1GEVB 18 W High Power Factor LED Driver Evaluation Board User s Manual Overview www.onsemi.com This manual covers the specification, theory of operation, testing and construction of the NCL30088LED1GEVB EVAL BOARD USERS MANUAL demonstration board. The NCL30088 board demonstrates a 18 W high PF buck boost LED driver in a typical T8 outline. Table 1. SPECIFICATIONS Key Features Parameter Value Comment As illustrated, the key features of this evaluation board include: Input voltage (Class 2 Input, 100 277 no ground) V ac Wide Mains Line Frequency 50 Hz / 60 Hz Low THD across Line and Load High Power Factor across Wide Line and Load Power Factor (100% Load) 0.9 Min Integrated Auto Recovery Fault Protection (can be THD (Load > 30%) 20% Max latched by Choice of Options) Output Voltage Range 90 180 V dc Over Temperature on Board (a PCB mounted NTC) Output Current 100 mA dc 2% Over Current Efficiency 92% Typical Output and Vcc Over Voltage Start Up Time < 500 msec Typical EMI (conducted) Class B FCC/CISPR Figure 1. Evaluation Board Picture (Top View) Semiconductor Components Industries, LLC, 2014 1 Publication Order Number: November, 2014 Rev. 0 EVBUM2285/DNCL30088LED1GEVB THEORY OF OPERATION Power Stage Auxiliary Winding The power stage for the demo board is a nonisolated The auxiliary winding has 3 functions: buckboost based. The controller has a built in control 1. CrM timing algorithm that is specific to the flyback transfer function. 2. Vcc Power Specifically: 3. Output voltage sense Duty Vout CrM Timing Vin (1 Duty) In the off time, the voltage on the transformer/inductor forward biases Dout and D9. When the current in the This is applicable to flyback, buckboost, and SEPIC magnetic has reached zero, the voltage collapses to zero. converters. The control is very similar to the control of the This voltage collapse triggers a comparator on the ZCD pin NCL3008083 with the addition of a power factor to start a new switching cycle. The ZCD pin also counts rings correction control loop. The controller has a built in on the auxiliary winding for higher order valley operation. hardware algorithm that relates the output current to a A failure of the ZCD pin to reach a certain threshold also reference on the primary side. indicates a shorted output condition. Vref Nps Iout Vcc Power 2 Rsense The auxiliary winding forward biases D9 to provide Npri Nps power for the controller. This arrangement is called a Nsec bootstrap. Initially the Cvcc, is charged through R4 and Where Npri = Primary Turns and Nsec = Secondary Turns R5. When the voltage on Cvcc reaches, the startup threshold, We can now find Rsense for a given output current. the controller starts switching and providing power to the output circuit and the Cvcc. Cvcc discharges as the Vref Nps Rsense controller draws current. As the output voltage rises, the 2 Iout auxiliary winding starts to provide all the power to the Line Feedforward controller. Ideally, this happens before Cvcc discharges to The controller is designed to precisely regulate output the under voltage threshold where the controller stops current but variation input line voltage do have an impact. operating to allow Cvcc to recharge once again. The size of R3 sets the line feedforward and compensates for power the output capacitor will have a large effect on the rise of the stage delay times by reducing the current threshold as the output voltage. Since the LED driver is a current source, the line voltage increases. R3 is also used by the shorted pin rise of output voltage is directly dependent on the size of the detection. At start up the controller puts out a current to output capacitor. check for a shorted pin. If R3 is zero, the current sense There are tradeoffs in the selection of Cout and Cvcc. A resistor is too low a value and the controller will not start low output ripple will require a large Cout value. This because it will detect a shorted pin. So R3 is required to make requires that Cvcc be large enough to support Vcc power to the controller operate properly. In practice, R3 should be the controller while Cout is charging up. A large value of greater than 250 . Cvcc requires that R4 and R5 be lower in value to allow a fast enough startup time. Smaller values of R4 and R5 have Voltage Sense higher static power dissipation which lowers efficiency of The voltage sense pin has several functions: the driver. 1. Basis for the reference of the PFC control loop Output Voltage Sense 2. Line Range detection The auxiliary winding voltage is proportional to the The reference scaling is automatically controller inside output voltage by the turns ratio of the output winding and the controller. While the voltage on Vs is not critical for the the auxiliary winding. The controller has an overvoltage PFC loop control, it is important for the range detection. limit on the Vcc pin at about 26 V minimum. Above that Generally the voltage on Vs should be 3.5 V peak at the threshold, the controller will stop operation and enter highest input voltage of interest. The voltage on Vs overvoltage fault mode such as when an open LED string determines which valley the power stage will operate in. At occurs. low line and maximum load, the power stage operates in the In cases where the output has a lot of ripple current and the first valley (standard CrM operation). At the higher line LED has high dynamic resistance, the peak output voltage range, the power stage moves to the second valley to lower can be much higher than the average output voltage. The the switching frequency while retaining the advantage of auxiliary winding will charge the Cvcc to the peak of the CrM soft switching. output voltage which may trigger the OVP sooner than expected so in this case the peak voltage of the LED string is critical.