NCP1597AMNTWG ON Semiconductor

NCP1597A Buck Regulator - Synchronous 1 MHz, 2.0 A The NCP1597A family are fixed 1 MHz, highoutputcurrent, NCP1597A BLOCK DIAGRAM NCP1597A VCCP VCC + CA Power Reset UVLO NC/EN THD Hiccup OSC + PMOS SoftStart M1 + PWM Control LX Logic Vref gm + + FB GND Figure 1. Block Diagram PIN DESCRIPTIONS Pin No Symbol Description 1 FB Feedback input pin of the Error Amplifier. Connect a resistor divider from the converters output volt- age to this pin to set the converters output voltage. 2 GND Ground pin. Connect to thermal pad. 3 LX The drains of the internal MOSFETs. The output inductor should be connected to this pin. 4 V Power input for the power stage CCP 5 V Input supply pin for internal bias circuitry. A 0.1 F ceramic bypass capacitor is preferred to connect CC to this pin. 6 EN Logic input to enable the part. Logic high to turn on the part and logic low to shut off the part. EP PAD Exposed pad of the package provides both electrical contact to the ground and good thermal contact to the PCB. This pad must be soldered to the PCB for proper operation.