NCP3170 Synchronous PWM Switching Converter The NCP3170 is a flexible synchronous PWM Switching Buck Regulator. The NCP3170 operates from 4.5 V to 18 V, sourcing up to 3 A and is capable of producing output voltages as low as 0.8 V. www.onsemi.com The NCP3170 also incorporates current mode control. To reduce the number of external components, a number of features are internally set including soft start, power good detection, and switching frequency. The NCP3170 is currently available in an SOIC8 package. SOIC8 NB Features CASE 751 4.5 V to 18 V Operating Input Voltage Range 90 m High-Side, 25 m Low-Side Switch MARKING DIAGRAM FMEA Fault Tolerant During Pin Short Test 8 3 A Continuous Output Current 3170x Fixed 500 kHz and 1 MHz PWM Operation ALYW Cycle-by-Cycle Current Monitoring 1 1.5% Initial Output Accuracy Internal 4.6 ms Soft-Start 3170x = Specific Device Code Short-Circuit Protection x = A or B Turn on Into Pre-bias A = Assembly Location L = Wafer Lot Power Good Indication Y = Year Light Load Efficiency W = Work Week = Pb-Free Package Thermal Shutdown These are Pb-Free Devices PIN CONNECTIONS Typical Applications V Set Top Boxes PGND SW V PG IN DVD/Bluray Drives and HDD AGND EN LCD Monitors and TVs FB COMP Cable Modems (Top View) PCIe Graphics Cards Telecom/Networking/Datacom Equipment ORDERING INFORMATION Point of Load DC/DC Converters Device Package Shipping V NCP3170ADR2G SOIC8 2,500/Tape & Reel IN C1 (PbFree) VIN 22 F L1 4.7 H NCP3170BDR2G SOIC8 2,500/Tape & Reel VSW (PbFree) EN 3.3 V NCP3170 For information on tape and reel specifications, R1 PG including part orientation and tape sizes, please C2, C3 refer to our Tape and Reel Packaging Specifications COMP FB1 22 F Brochure, BRD8011/D. C C R2 AGND PGND R C Figure 1. Typical Application Circuit Semiconductor Components Industries, LLC, 2014 1 Publication Order Number: March, 2017 Rev. 6 NCP3170/DNCP3170 VIN VDD EN Power UVLO Driver VCV Control Voltage POR (PC) Clamp VCL Soft Start Reference Slope 0.030 V/A Compensation Current ORing Sense Circuit SET Pulse by Oscillator S Q Pulse + FB R Q Current CLR + Limit VIN COMP Soft Start Logic Complete HS PDRV + VSW VCW 998 mV + hs 867 mV VCL + 728 mV LS NDRV PG VSW Over Zero Temperature Current Protection Detection AGND PGND Figure 2. NCP3170 Block Diagram Table 1. PIN FUNCTION DESCRIPTION Pin Pin Name Description 1 PGND The power ground pin is the high current path for the device. The pin should be soldered to a large copper area to reduce thermal resistance. PGND needs to be electrically connected to AGND. 2 VIN The input voltage pin powers the internal control circuitry and is monitored by multiple voltage comparators. The VIN pin is also connected to the internal power PMOS switch and linear regulator output. The VIN pin has high di/dt edges and must be decoupled to ground close to the pin of the device. 3 AGND The analog ground pin serves as small-signal ground. All small-signal ground paths should connect to the AGND pin and should also be electrically connected to power ground at a single point, avoiding any high current ground returns. 4 FB Inverting input to the OTA error amplifier. The FB pin in conjunction with the external compensation serves to stabilize and achieve the desired output voltage with current mode compensation. 5 COMP The loop compensation pin is used to compensate the transconductance amplifier which stabilizes the operation of the converter stage. Place compensation components as close to the converter as possible. Connect a RC network between COMP and AGND to compensate the control loop. 6 EN Enable pin. Pull EN to logic high to enable the device. Pull EN to logic low to disable the device. Do not leave it open. 7 PG Power good is an open drain 500 A pull down indicating output voltage is within the power good window. If the power good function is not used, it can be connected to the VSW node to reduce thermal resistance. Do not connect PG to the VSW node if the application is turning on into pre-bias. 8 VSW The VSW pin is the connection of the drains of the internal N and P MOSFETS. At switch off, the inductor will drive this pin below ground as the body diode and the NMOS conducts with a high dv/dt. www.onsemi.com 2