NCP1631 Interleaved, 2-Phase Power Factor Controller The NCP1631 integrates a dual MOSFET driver for interleaved PFC applications. Interleaving consists of paralleling two small stages in lieu of a bigger one, more difficult to design. This approach has several merits like the ease of implementation, the use of smaller www.onsemi.com components or a better distribution of the heating. Also, Interleaving extends the power range of Critical Conduction MARKING DIAGRAM Mode that is an efficient and costeffective technique (no need for low t diodes). In addition, the NCP1631 drivers are 180 phase shift rr for a significantly reduced current ripple. NCP1631G SOIC16 AWLYWW Housed in a SOIC16 package, the circuit incorporates all the D SUFFIX features necessary for building robust and compact interleaved PFC CASE 751B stages, with a minimum of external components. A = Assembly Location WL = Wafer Lot General Features Y = Year NearUnity Power Factor WW = Work Week G = PbFree Package Substantial 180 Phase Shift in All Conditions Including Transient Phases PIN ASSIGNMENT Frequency Clamped Critical Conduction Mode (FCCrM) i.e., ZCD2 ZCD1 1 Fixed Frequency, Discontinuous Conduction Mode Operation with FB REF5V/pfcOK Critical Conduction Achievable in Most Stressful Conditions Rt DRV1 FCCrM Operation Optimizes the PFC Stage Efficiency Over the OSC GND Load Range Vcontrol Vcc Outofphase Control for Low EMI and a Reduced rms Current in FFOLD DRV2 the Bulk Capacitor BO Latch Frequency Foldback at Low Power to Further Improve the Light OVP / UVP CS Load Efficiency (Top View) Accurate Zero Current Detection by Auxiliary Winding for Valley Turn On ORDERING INFORMATION Fast Line / Load Transient Compensation Device Package Shipping High Drive Capability: 500 mA / +800 mA NCP1631DR2G SOIC16 2500 / Tape & Reel Signal to Indicate that the PFC is Ready for Operation (pfcOK (PbFree) Pin) For information on tape and reel specifications, V Range: from 10 V to 20 V including part orientation and tape sizes, please CC refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Safety Features Typical Applications Output Over and Under Voltage Protection Computer Power Supplies Brown Out Detection with a 50ms Delay to Help LCD / Plasma Flat Panels Meet Holdup Time Specifications All Off Line Appliances Requiring Power Factor SoftStart for Smooth Startup Operation Correction Programmable Adjustment of the Maximum Power Over Current Limitation Detection of Inrush Currents *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 2016 1 Publication Order Number: March, 2019 Rev. 8 NCP1631/DNCP1631 Vin Vout V I L aux2 coil1 2 R zcd2 R R L V bo1 ovp1 R 1 aux2 out1 R zcd1 1 16 I coil2 D 1 R out2 2 15 Vout pfcOK 3 14 D 2 M 1 OVP in C R osc t413 12 5 LOAD Vcc M 2 R C FF Ac line 6 comp2 11 R R bo2 ovp2 R comp1 10 7 8 9 EMI C comp1 C bo2 C Filter bulk OVP R Cin ocp in R CS I in Figure 1. Typical Application Schematic Table 1. MAXIMUM RATINGS Symbol Rating Pin Value Unit V Maximum Power Supply Voltage Continuous 12 0.3, +20 V CC(MAX) DRV Maximum Voltage on DRV Pins 11, 14 0.3 V, V V MAX CC V Maximum Input Voltage on Low Power Pins 1, 2, 3, 4, 6, 7, 0.3, +9.0 V MAX 8, 9, 10, 15, and 16 V V Pin Maximum Input Voltage 5 0.3, V (Note 1) V Control(MAX) Control Control(clamp) Power Dissipation and Thermal Characteristics P Maximum Power Dissipation T = 70C 550 mW D A R Thermal Resistance JunctiontoAir 145 C/W J A T Operating Junction Temperature Range 55 to +150 C J T Maximum Junction Temperature 150 C J(MAX) T Storage Temperature Range 65 to +150 C S(MAX) T Lead Temperature (Soldering, 10s) 300 C L(MAX) ESD Capability, HBM model (Note 2) 3 kV ESD Capability, Machine Model (Note 2) 250 V Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. V is the pin5 clamp voltage. Control(clamp) 2. This device(s) contains ESD protection and exceeds the following tests: Human Body Model 2000 V per JEDEC Standard JESD22A114E Machine Model Method 200 V per JEDEC Standard JESD22A115A 3. This device contains latchup protection and exceeds 100 mA per JEDEC Standard JESD78. www.onsemi.com 2