NCP392ARFCCT1G ON Semiconductor

NCP392A Adjustable Front End Overvoltage Protection Controller with Protected Vbus Output www.onsemi.com The NCP392A is an overvoltage front end protection and be able to disconnect the systems from its output pin in case wrong input operating conditions are detected, up to +28 V. Due to this device MARKING using internal NMOS, no external device is necessary, reducing the DIAGRAM system cost and the PCB area of the application board. Internal OVLO threshold is available, or can be adjusted if external 392AR WLCSP 12 resistor bridge is used (A version). AYWW FCC SUFFIX At power up (EN pin = low level), the Vout turns on tstart time after CASE 567JM internal timer elapsed. A LDO, internally connected on IN pin, provided a protected output A = Assembly Location Y = Year voltage even if an over voltage is present on IN pin. WW = Work Week = PbFree Package Features Overvoltage Protection Up to + 28 V Onchip Low R NMOS Transistors: Typical 34 m DS(on) Overvoltage Lockout (OVLO) PIN CONNECTION Externally Adjustable OVLO 123 4 Protected VBUS Indicator Output VBUS DET Internal 15 ms Startup Delay A /EN OUT OUT PGND 100 ms Start Up Delay Option (B Version) Shutdown EN Input + 86 V Surge Capability, in Compliance with IEC6100045 VBUS B OUT IN PGND D Compliance to IEC6100042 (Level 4) 8 kV (Contact) OVLO IN IN PGND C 15 kV (Air) ESD Ratings: Machine Model = B (200 V) (Top View) Human Body Model = 2 (2 kV) CSP12 package 1.3 x 2.0 mm, 0.4 mm Pitch ORDERING INFORMATION This is a PbFree Device See detailed ordering, marking and shipping information on page 9 of this data sheet. Typical Applications Cell Phones Tablets Camera Phones Digital Still Cameras Personal Digital Applications. Semiconductor Components Industries, LLC, 2015 1 Publication Order Number: April, 2015 Rev. 4 NCP392A/DNCP392A OUTPUT CHARGER IN B3 A2 OUT NCP392A 0.1 F Lithium Battery IN C2 OUT A3 IN OUT C3 B2 PMIC GND C1 OVLO GND GND EN VBUS D B1 VBUS DET C4 A4 B4 A1 /EN Figure 1. Typical Application Circuit: NCP392A with Adjustable OVLO FUNCTIONAL BLOCK DIAGRAM INPUT OUTPUT Gate driver OVLO VREF GND Charge Pump Control OVLO logic and TSD Timer OVLO SEL /EN VIN /EN LDO VBUS DET Figure 2. Functional Block Diagram: Version A www.onsemi.com 2 C1 C2 R1 R2 External OVLO selected Internal OVLO selected