NOIP1SN1300A, NOIP1SN0500A, NOIP1SN0300A PYTHON 0.3/0.5/1.3 Megapixel Global Shutter CMOS Image Sensors www.onsemi.com Features SXGA: 1280 x 1024 Active Pixels, 1/2 Optical Format SVGA: 800 x 600 Active Pixels, 1/3.6 Optical Format VGA: 640 x 480 Active Pixels, 1/4 Optical Format 4.8 m x 4.8 m Low Noise Global Shutter Pixels with In-pixel CDS Monochrome (SN) or Color (SE) Zero ROT Mode Enabling Faster Frame Rate Frame Rate at Full Resolution (LVDS) 210/175 frames per second SXGA (Zero ROT/Normal ROT) 560/420 frames per second SVGA (Zero ROT/Normal ROT) 860/620 frames per second VGA (Zero ROT/Normal ROT) 43 Frames per Second (fps) at Full Resolution (CMOS) On-chip 10-bit Analog-to-Digital Converter (ADC) 8-bit or 10-bit Output Mode Four Low Voltage Differential Signaling (LVDS) High Speed Figure 1. PYTHON 1300 Photograph Serial Outputs or Parallel CMOS Output Random Programmable Region of Interest (ROI) Readout Pipelined and Triggered Global Shutter, Rolling Shutter On-chip Fixed Pattern Noise (FPN) Correction The sensor has on-chip programmable gain amplifiers and Serial Peripheral Interface (SPI) 10-bit A/D converters. The integration time and gain Automatic Exposure Control (AEC) parameters can be reconfigured without any visible image Phase Locked Loop (PLL) artifact. Optionally the on-chip automatic exposure control High Dynamic Range (HDR) loop (AEC) controls these parameters dynamically. The Dual Power Supply (3.3 V and 1.8 V) images black level is either calibrated automatically or can 40C to +85C Operational Temperature Range be adjusted by adding a user programmable offset. A high level of programmability using a four wire serial 48-pin LCC and Bare Die peripheral interface enables the user to read out specific 590 mW Power Dissipation (LVDS) regions of interest. Up to 8 regions can be programmed, 375 mW Power Dissipation (CMOS) achieving even higher frame rates. These Devices are PbFree and are RoHS Compliant The image data interface of the P1-SN/SE part consists of Applications four LVDS lanes, facilitating frame rates up to 210 frames Machine Vision per second in Zero ROT mode. Each channel runs at 720 Mbps. A separate synchronization channel containing Motion Monitoring payload information is provided to facilitate the image Security reconstruction at the receiving end. The P2-SN/SE part Barcode Scanning (2D) provides a parallel CMOS output interface at reduced frame Description rate. The Pythons high sensitivity 4.8 m x 4.8 m pixels The PYTHON low resolution family is packaged in a support low noise pipelined and triggered global shutter 48-pin LCC package and is available in a monochrome and readout modes. In global shutter mode, the sensor supports color version. For NIR variants, please contact your local correlated double sampling (CDS) readout, reducing noise distributor or email us at imagesensors onsemi.com. and increasing dynamic range. Semiconductor Components Industries, LLC, 2014 1 Publication Order Number: October, 2014 Rev. P2 PB NOIP1SN1300A/DNOIP1SN1300A, NOIP1SN0500A, NOIP1SN0300A SPECIFICATIONS Key Specifications Table 1. GENERAL SPECIFICATIONS Table 2. ELECTROOPTICAL SPECIFICATIONS Parameter Specification Parameter Specification Pixel type Inpixel CDS. Global shutter pixel Active pixels SXGA: 1280 (H) x 1024 (V) architecture SVGA: 800 (H) x 600 (V) VGA: 640 (H) x 480 (V) Shutter type Pipelined and triggered global shutter Pixel size 4.8 m x 4.8 m Frame rate P1SN/SE: 210/175 fps SXGA Conversion gain 0.096 LSB10/e Zero ROT/Normal 560/420 fps SVGA ROT mode 140 V/e 860/620 fps VGA P2SN/SE: 43 fps Dark temporal noise < 9e (Normal ROT, 1x gain) < 7e (Normal ROT, 2x gain) Master clock P1SN/SE: 72 MHz when PLL is used, Responsivity at 550 nm 7.7 V/lux.s 360 MHz (10bit) / 288 MHz (8bit) Parasitic Light <1/8000 when PLL is not used P2SN/SE: 72 MHz Sensitivity (PLS) Windowing 8 Randomly programmable windows. Full Well Charge 10000 e Normal, subsampled and binned Quantum Efficiency at 56% readout modes 550 nm ADC resolution 10bit, 8bit (Note 1) Pixel FPN < 0.5 LSB10 LVDS outputs P1SN/SE: 4/2/1 data + sync + clock PRNU < 10 LSB10 CMOS outputs P2SN/SE: 10bit parallel output, MTF 68% 535 nm Xdir & Ydir frame valid, line valid, clock PSNL at 20C 120 LSB10/s, 1200 e /s Data rate P1SN/SE: 4 x 720 Mbps (10bit) / Dark signal at 20C 5 e /s, 0.5 LSB10/s 4 x 576 Mbps (8bit) P2SN/SE: 72 MHz Dynamic Range > 60 dB in global shutter mode Power dissipation P1SN/SE: 590 mW, 10bit mode Signal to Noise Ratio 40 dB P2SN/SE: 375 mW (SNR max) Package type 48pin LCC 1. The ADC is 11bit, downscaled to 10bit. The PYTHON uses a larger wordlength internally to provide 10bit on the output. To receive a detailed product data sheet and supporting documentation, visit the CISP Extranet at www.onsemi.com/MyON. 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