DATA SHEET www.onsemi.com MARKING Switch mode Pulse Width DIAGRAMS Modulation Control Circuit 16 SOIC16 TL494xDG D SUFFIX TL494, NCV494 AWLYWW CASE 751B 1 The TL494 is a fixed frequency, pulse width modulation control circuit designed primarily for switch mode power supply control. 16 Features PDIP16 * Complete Pulse Width Modulation Control Circuitry TL494xN N SUFFIX AWLYYWWG OnChip Oscillator with Master or Slave Operation CASE 648 1 OnChip Error Amplifiers OnChip 5.0 V Reference x = B, C or I Adjustable Deadtime Control A = Assembly Location Uncommitted Output Transistors Rated to 500 mA Source or Sink WL = Wafer Lot Output Control for PushPull or SingleEnded Operation YY, Y = Year WW, W = Work Week Undervoltage Lockout G = PbFree Package NCV Prefix for Automotive and Other Applications Requiring Site and Control Changes *This marking diagram also applies to NCV494. PbFree Packages are Available* PIN CONNECTIONS MAXIMUM RATINGS (Full operating ambient temperature range applies, Noninv Noninv 1 + + 16 unless otherwise noted.) Input Input Error Error 1 2 Amp Amp Inv Inv - - Rating Symbol Value Unit 2 15 Input Input V CC Power Supply Voltage V 42 V CC Compen/PWN 5.0 V 3 14 V ref Comp Input REF 0.1 V Collector Output Voltage V , 42 V C1 Deadtime Output 4 13 V C2 Control Contro l Collector Output Current I , I 500 mA C1 C2 C 5 12 V T CC (Each transistor) (Note 1) Oscillator R 6 11 C2 T Amplifier Input Voltage Range V 0.3 to +42 V IR Q2 Ground 7 10 E2 Power Dissipation T 45C P 1000 mW A D Q1 Thermal Resistance, JunctiontoAmbient R 80 C/W JA C189 E1 Operating Junction Temperature T 125 C J (Top View) Storage Temperature Range T 55 to +125 C stg Operating Ambient Temperature Range T C A TL494B 40 to +125 ORDERING INFORMATION TL494C 0 to +70 See detailed ordering and shipping information in the package TL494I 40 to +85 dimensions section on page 4 of this data sheet. NCV494B 40 to +125 Derating Ambient Temperature T 45 C A Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Maximum thermal limits must be observed. *For additional information on our PbFree strategy and soldering details, please download the onsemi Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 2005 1 Publication Order Number: August, 2021 Rev. 7 TL494/DTL494, NCV494 RECOMMENDED OPERATING CONDITIONS Characteristics Symbol Min Typ Max Unit Power Supply Voltage V 7.0 15 40 V CC Collector Output Voltage V , V 30 40 V C1 C2 Collector Output Current (Each transistor) I , I 200 mA C1 C2 Amplified Input Voltage V 0.3 V 2.0 V in CC Current Into Feedback Terminal l 0.3 mA fb Reference Output Current l 10 mA ref Timing Resistor R 1.8 30 500 k T Timing Capacitor C 0.0047 0.001 10 F T Oscillator Frequency f 1.0 40 200 kHz osc ELECTRICAL CHARACTERISTICS (V = 15 V, C = 0.01 F, R = 12 k , unless otherwise noted.) CC T T For typical values T = 25C, for min/max values T is the operating ambient temperature range that applies, unless otherwise noted. A A Characteristics Symbol Min Typ Max Unit REFERENCE SECTION Reference Voltage (I = 1.0 mA) V 4.75 5.0 5.25 V O ref Line Regulation (V = 7.0 V to 40 V) Reg 2.0 25 mV CC line Load Regulation (I = 1.0 mA to 10 mA) Reg 3.0 15 mV O load Short Circuit Output Current (V = 0 V) I 15 35 75 mA ref SC OUTPUT SECTION Collector OffState Current I 2.0 100 A C(off) (V = 40 V, V = 40 V) CC CE Emitter OffState Current I 100 A E(off) V = 40 V, V = 40 V, V = 0 V) CC C E CollectorEmitter Saturation Voltage (Note 2) V CommonEmitter (V = 0 V, I = 200 mA) V 1.1 1.3 E C sat(C) EmitterFollower (V = 15 V, I = 200 mA) V 1.5 2.5 C E sat(E) Output Control Pin Current Low State (V 0.4 V) I 10 A OC OCL High State (V = V ) I 0.2 3.5 mA OC ref OCH Output Voltage Rise Time t ns r CommonEmitter (See Figure 12) 100 200 EmitterFollower (See Figure 13) 100 200 Output Voltage Fall Time t ns f CommonEmitter (See Figure 12) 25 100 EmitterFollower (See Figure 13) 40 100 2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible. www.onsemi.com 2