EK42421-01 pSemi

Product Specification PE42421 SPDT UltraCMOS 10 MHz 3.0 GHz RF Switch Product Description Features Single-pin or complementary CMOS The PE42421 UltraCMOS RF switch is designed to logic control inputs cover a broad range of applications from 10 MHz through 3000 MHz. This reflective switch integrates Low insertion loss: 0.35 dB at on-board CMOS control logic with a low voltage 1000 MHz, 0.5 dB at 2000 MHz CMOS-compatible control interface, and can be Isolation of 30 dB at 1000 MHz, 20 dB controlled using either single-pin or complementary at 2000 MHz control inputs. Using a nominal +3-volt power supply voltage, a typical input 1 dB compression point of Typical input 1 dB compression point +33.5 dBm can be achieved. of +33.5 dBm 1.8V minimum power supply voltage The PE42421 SPDT RF switch is manufactured on Peregrines UltraCMOS process, a patented SC-70 package variation of silicon-on-insulator (SOI) technology on a sapphire substrate, offering the performance of GaAs with the economy and integration of conventional CMOS. Figure 1. Functional Diagram Figure 2. Package 6-lead SC-70 RFC RF1 RF2 ESD ESD CMOS Control Driver CTRL CTRL or V DD 71-0015-01 Document No. 70-0396-03 www.psemi.com 2010-2013 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 9 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: PE42421 Product Specification Table 1. Electrical Specifications +25C, V = 3V (Z = Z = 50 ) DD S L Parameter Condition Minimum Typical Maximum Unit 1 Operation Frequency 10 MHz 3000 MHz 1000 MHz 0.35 0.45 dB 3 Insertion Loss 2000 MHz 0.50 0.60 dB 1000 MHz 29 30 dB Isolation 2000 MHz 19 20 dB 1000 MHz 21 22 dB 3 Return Loss 2000 MHz 24 27 dB ON Switching Time 50% CTRL to 0.1 dB of final value, 1 GHz 1.50 us OFF Switching Time 50% CTRL to 25 dB isolation, 1 GHz 1.50 us 2 Video Feedthrough 15 mV pp 1000 MHz 2.3 - 3.3V 31.5 33.5 1000 MHz 1.8 - 2.3V 29.5 30.5 Input 1 dB Compression dBm 2500 MHz 2.3 - 3.3V 28.5 30.5 2500 MHz 1.8 - 2.3V 28 29 Input IP3 1000 MHz, 20dBm input power 55 dBm Notes: 1. Device linearity will begin to degrade below 10 MHz 2. The DC transient at the output of any port of the switch when the control voltage is switched from Low to High or High to Low in a 50 test set-up, measured with 1ns risetime pulses and 500 MHz bandwidth 3. A tuning capacitor must be added to the application board to optimize the insertion loss and return loss performance. See Figure 6 for details 2010-2013 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0396-03 UltraCMOS RFIC Solutions Page 2 of 9 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: