PE42553 Document Category: Product Specification UltraCMOS SPDT RF Switch, 9 kHz8 GHz Features Applications Excellent power handling: 36 dBm CW and 38 dBm Test and measurement pulsed power in 50 8 GHz Signal sources High linearity: IIP3 of 66 dBm Communication testers High isolation Spectrum analyzers 45 dB 3 GHz Network analyzers 41 dB 8 GHz Automated test equipment HaRP technology enhanced General purpose TX/RX switch Fast settling time Figure 1 PE42553 Functional Diagram No gate and phase lag No drift in insertion loss and phase RFC High ESD performance 2.5 kV HBM on all pins, 4 kV HBM on RF pins to GND 1 kV CDM on all pins RF1 RF2 Packaging 16-lead 3 3 mm QFN 50 50 CMOS Control Driver and ESD LS CTRL V SS EXT Product Description TM The PE42553 is a HaRP technology-enhanced absorptive SPDT RF switch that supports a broad frequency range from 9 kHz to 8 GHz. This general purpose switch maintains excellent linearity, high RF performance and fast settling time making this device ideal for test and measurement (T&M), automated test equipment (ATE) and other high performance wireless applications. The PE42553 is a pin-compatible version of the PE42552 with improved power handling capability of 36 dBm continuous wave (CW) and 38 dBm pulsed power in 50 at 8 GHz. No blocking capacitors are required if DC voltage is not present on the RF ports. The PE42553 is manufactured on pSemis UltraCMOS process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate. 20162020 pSemi Corporation. All rights reserved. Headquarters: 9369 Carroll Park Drive, San Diego, CA, 92121 Product Specification DOC-76991-3 (06/2020) www.psemi.comPE42553 SPDT RF Switch pSemis HaRP technology enhancements deliver high linearity and excellent harmonics performance. It is an innovative feature of the UltraCMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. Optional External V SS For proper operation, the V pin must be grounded or tied to the V voltage specified in Table 2. When the SS EXT SS V pin is grounded, FETs in the switch are biased with an internal negative voltage generator. For applica- SS EXT tions that require the lowest possible spur performance, V can be applied externally to bypass the internal SS EXT negative voltage generator. Absolute Maximum Ratings Exceeding absolute maximum ratings listed in Table 1 may cause permanent damage. Operation should be restricted to the limits in Table 2. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. ESD Precautions When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 1. Latch-up Immunity Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up. Table 1 Absolute Maximum Ratings for PE42553 Parameter/Condition Min Max Unit Supply voltage, V 0.3 5.5 V DD Digital input voltage, CTRL 0.3 3.6 V LS input voltage 0.3 3.6 V (1) RF input power, CW (RFCRFX) Fig. 2, Fig. 3 dBm 9 kHz10 MHz 37 dBm >10 MHz8 GHz (2) RF input power, pulsed (RFCRFX) Fig. 2, Fig. 3 dBm 9 kHz10 MHz Fig. 4, Fig. 5 dBm >10 MHz8 GHz (1) RF input power into terminated ports, CW (RFX) Fig. 2, Fig. 3 dBm 9800 kHz 28 dBm >800 kHz8 GHz Maximum junction temperature +150 C Storage temperature range 65 +150 C Page 2 of 20 DOC-76991-3 (06/2020) www.psemi.com