SDO2 1.4 SDO1 CLKO 2.8 LEO 5.6 11.2 22.5 S/P 45 OPT 90 180 PE44820 Document Category: Product Specification UltraCMOS RF Digital Phase Shifter 8-bit, 1.72.2 GHz Features Figure 1 PE44820 Functional Diagram 8-bit full-range phase shifter of 358.6 180, 90, 45, 22.5, 11.2, 5.6, 2.8 and 1.4 bits Low RMS phase and amplitude error RF1 RF2 RMS phase error of 1.0 RMS amplitude error of 0.1 dB High linearity of +60 dBm IIP3 SI Extended narrow band frequency operation of V DD 1.13.0 GHz CLK Digital Interface V SS EXT +105 C operating temperature GND Packaging 32-lead 5 5 0.85 mm QFN LE Applications 8 4 Base station transceivers P0... P7 A0... A3 Parallel Serial Weather and military radar Interface Address Active antenna arrays S/P = Parallel S/P = Serial Product Description The PE44820 is a HaRP technology-enhanced 8-bit digital phase shifter (DPS) designed for use in a broad range of applications including: beamforming networks, distributed antenna systems, active antenna systems and phased array applications. This DPS covers a phase range of 358.6 degrees in 1.4 degree steps, maintaining excellent phase and amplitude accuracy across the nominal frequency band of 1.72.2 GHz. The PE44820 is also capable of extended frequency operation from 1.13.0 GHz for narrow band applications, as detailed in Application Note 45. An integrated digital control interface supports both serial and parallel programming of the phase setting. The PE44820 also features an external negative supply option for a faster switching frequency, and is offered in a 32-lead 5 5 0.85 mm QFN package. In addition, no external blocking capacitors are required if 0 VDC is present on the RF ports. The PE44820 is manufactured on pSemis UltraCMOS process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate. pSemis HaRP technology enhancements deliver high linearity and excellent harmonics performance. It is an innovative feature of the UltraCMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. 20152016, 2018, pSemi Corporation. All rights reserved. Headquarters: 9369 Carroll Park Drive, San Diego, CA, 92121 Product Specification DOC-43214-7 (10/2018) www.psemi.com Serial InterfacePE44820 Digital Phase Shifter Optional External V SS For proper operation, the V pin must be grounded or tied to the V voltage specified in Table 2. When the SS EXT SS V pin is grounded, FETs in the switch are biased with an internal negative voltage generator. For applica- SS EXT tions that require the lowest possible spur performance, V can be applied externally to bypass the internal SS EXT negative voltage generator. Absolute Maximum Ratings Exceeding absolute maximum ratings listed in Table 1 may cause permanent damage. Operation should be restricted to the limits in Table 2. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. ESD Precautions When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 1. Latch-up Immunity Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up. Table 1 Absolute Maximum Ratings for PE44820 Parameter/Condition Min Max Unit Supply voltage, V 0.3 5.5 V DD Negative supply voltage, V 3.6 2.4 V SS EXT Digital input voltage 0.3 3.6 V Maximum input power 28 dBm Storage temperature range 65 +150 C (*) 500 V ESD voltage HBM, all pins Note: * Human body model (MIL-STD 883 Method 3015). Page 2 of 22 DOC-43214-7 (10/2018) www.psemi.com