PE42525 Document Category: Product Specification UltraCMOS SPDT RF Switch, 9 kHz60 GHz Features Figure 1 PE42525 Functional Diagram Wideband support up to 60 GHz Low insertion loss RFC 1.3 dB 26.5 GHz 1.7 dB 45 GHz 1.9 dB 50 GHz RF1 RF2 2.7 dB 60 GHz Fast switching time of 8 ns High port to port isolation 41 dB 26.5 GHz ESD 38 dB 45 GHz 37 dB 50 GHz V1 V2 36 dB 60 GHz High linearity: IIP3 of 48 dBm Flip-chip die, pin-to-pin compatible to the PE42524 and the PE426525 Applications Test and measurement Microwave backhaul Radar Military communications Product Description The PE42525 is a HaRP technology-enhanced reflective SPDT RF switch die that supports a wide frequency range from 9 kHz to 60 GHz. This wideband flip-chip switch is pin compatible to the PE42524 and the PE426525. It delivers low insertion loss, fast switching time and high isolation performance, making this device ideal for test and measurement (T&M), microwave backhaul, radar and military communications (mil-comm) applications. At 50 GHz, the PE42525 exhibits 1.9 dB insertion loss and 37 dB isolation. No blocking capacitors are required if DC voltage is not present on the RF ports. The PE42525 is manufactured on Peregrines UltraCMOS process, a patented variation of silicon-on-insulator (SOI) technology. 2016, Peregrine Semiconductor Corporation. All rights reserved. Headquarters: 9380 Carroll Park Drive, San Diego, CA, 92121 Product Specification DOC-64730-3 (12/2016) www.psemi.comPE42525 SPDT RF Switch Peregrines HaRP technology enhancements deliver high linearity and excellent harmonics performance. It is an innovative feature of the UltraCMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. Absolute Maximum Ratings Exceeding absolute maximum ratings listed in Table 1 may cause permanent damage. Operation should be restricted to the limits in Table 2. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. ESD Precautions When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 1. Latch-up Immunity Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up. Table 1 Absolute Maximum Ratings for PE42525 Parameter/Condition Min Max Unit Control voltage (V1, V2) 3.6 3.6 V RF input power (RFCRFX, 50 ) Fig. 2 dBm Maximum junction temperature +150 C Storage temperature range 65 +150 C (*) ESD voltage HBM 600 V All pins 1000 V RF pins to GND Note: * Human body model (MIL-STD 883 Method 3015). Page 2 DOC-64730-3 (12/2016) www.psemi.com