PE42562 Document Category: Product Specification UltraCMOS SP6T RF Switch, 9 kHz8 GHz Features Figure 1 PE42562 Functional Diagram High isolation: 35 dB 6 GHz RFC Low insertion loss: 1.1 dB 6 GHz Fast switching time of 210 ns Power handling of 33 dBm CW RF6 RF1 Logic select (LS) pin provides maximum control RF2 RF5 logic flexibility Terminated all-off state mode RF3 RF4 External V pin to eliminate spur SS CMOS Control switch Driver and ESD Packaging 24-lead 4 4 0.85 mm QFN configuration V1 V2 V3 V SS EXT Applications Test and measurement 50 Wireless applications up to 8 GHz Filter bank switching RF signal routing Product Description The PE42562 is a HaRP technology-enhanced absorptive SP6T RF switch that supports a frequency range from 9 kHz to 8 GHz. An external V pin is available for bypassing the internal negative voltage generator in SS order for the PE42562 to deliver spur-free performance. It delivers high isolation, low insertion loss and fast switching time, making this device ideal for filter bank switching and RF signal routing in test and measurement (T&M) and wireless applications up to 8 GHz. No blocking capacitors are required if DC voltage is not present on the RF ports. The PE42562 is manufactured on pSemis UltraCMOS process, a patented advanced form of silicon-on- insulator (SOI) technology. pSemis HaRP technology enhancements deliver high linearity and excellent harmonics performance. It is an innovative feature of the UltraCMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. 20172021, pSemi Corporation. All rights reserved. Headquarters: 9369 Carroll Park Drive, San Diego, CA, 92121 Product Specification DOC-75951-4 (04/2021) www.psemi.comPE42562 SP6T RF Switch Optional External V SS For proper operation, the V pin must be grounded or tied to the V voltage specified in Table 2. When the SS EXT SS V pin is grounded, FETs in the switch are biased with an internal negative voltage generator. For applica- SS EXT tions that require the lowest possible spur performance, V can be applied externally to bypass the internal SS EXT negative voltage generator. Absolute Maximum Ratings Exceeding absolute maximum ratings listed in Table 1 may cause permanent damage. Operation should be restricted to the limits in Table 2. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. ESD Precautions When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 1. Latch-up Immunity Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up. Table 1 Absolute Maximum Ratings for PE42562 Parameter/Condition Min Max Unit Supply voltage, V 0.3 5.5 V DD Digital input voltage (V1, V2, V3, LS) 0.3 3.6 V RF input power (RFCRFX, 50) See Figure 2 dBm (1) See Figure 2 dBm RF input power into terminated ports, CW (RFX, 50 ) Maximum junction temperature +150 C Storage temperature range 65 +150 C (1) 1000 V ESD voltage HBM, all pins (3) 1000 V ESD voltage CDM, all pins Notes: 1) 100% duty cycle, all bands, 50 . 2) Human body model (MIL-STD 883 Method 3015). 3) Charged device model (JEDEC JESD22-C101). Page 2 of 20 DOC-75951-4 (04/2021) www.psemi.com
