PE43502MLI pSemi

Product Specification PE43502 50 RF Digital Attenuator 5-bit, 15.5 dB, 9 kHz - 6 GHz Product Description Features The PE43502 is a HaRP-enhanced, high linearity, 5-bit RF Digital Step Attenuator (DSA). This highly versatile DSA HaRP-enhanced UltraCMOS device covers a 15.5 dB attenuation range in 0.5 dB steps. The Attenuation: 0.5 dB steps to 15.5-dB Peregrine 50 RF DSA provides multiple CMOS control interfaces. It maintains high attenuation accuracy over High Linearity: Typical +58 dBm IP3 frequency and temperature and exhibits very low insertion loss Excellent low-frequency performance and low power consumption. Performance does not change 3.3 V or 5.0 V Power Supply Voltage with V due to on-board regulator. This next generation DD Peregrine DSA is available in a 4x4 mm 24-lead QFN footprint. Fast switch settling time Programming Modes: The PE43502 is manufactured on Peregrines UltraCMOS process, a patented variation of silicon-on-insulator (SOI) Direct Parallel technology on a sapphire substrate, offering the performance Latched Parallel of GaAs with the economy and integration of conventional Serial CMOS. High-attenuation state power-up (PUP) CMOS Compatible Figure 1. Package Photo No DC blocking capacitors required 24-lead 4x4x0.85 mm QFN Package Packaged in a 24-lead 4x4x0.85 mm QFN Figure 2. Functional Schematic Diagram Switched Attenuator Array RF Input RF Output Parallel Control 5 Serial In Control Logic Interface CLK LE P/S Document No. 70-0247-06 www.psemi.com 2008-2009 Peregrine Semiconductor Corp. All rights reserved. Page 1 of 11 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: PE43502 Product Specification Table 1. Electrical Specifications +25C, V = 3.3 V or 5.0 V DD Parameter Test Conditions Frequency Min Typical Max Units Frequency Range 9 kHz 6 GHz Attenuation Range 0.5 dB Step 0 15.5 dB Insertion Loss 9 kHz 6 GHz 2.4 2.9 dB 0 dB - 15.5 dB Attenuation settings 9 kHz < 4 GHz (0.3 + 3%) dB 0 dB - 7.5 dB Attenuation settings 4 GHz 6 GHz +0.4 + 4% dB Attenuation Error 8 dB - 15.5 dB Attenuation settings 4 GHz 6 GHz +0.6 + 8% dB 0 dB - 15.5 dB Attenuation settings 4 GHz 6 GHz -0.2 - 3% dB Return Loss 9 kHz - 6 GHz 17 dB Relative Phase All States 9 kHz - 6 GHz 18 deg P1dB (note 1) Input 20 MHz - 6 GHz 30 32 dBm IIP3 Two tones at +18 dBm, 20 MHz spacing 20 MHz - 6 GHz 58 dBm Typical Spurious Value 1 MHz -110 dBm Video Feed Through 10 mVpp Switching Time 50% DC CTRL to 10% / 90% RF 650 ns RF Trise/Tfall 10% / 90% RF 400 ns RF settled to within 0.05 dB of final value Settling Time 4 s RBW = 5 MHz, Averaging ON. Note 1. Please note Maximum Operating Pin (50 ) of +23dBm as shown in Table 3. Performance Plots Figure 3. 0.5dB Step Error vs. Frequency* Figure 4. 1dB Attenuation vs. Attenuation State 200MHz 900MHz 1800MHz 2200MHz Attenuation 3000MHz 4000MHz 5000MHz 6000MHz 1.5 35 30 900 MHz 2200 MHz 1 3800 MHz 25 5800 MHz 20 0.5 15 10 0 5 -0.5 0 012 345678 9 10 11 12 13 14 15 16 035 1015 2025 305 Attenuation Setting (dB) Attenuation State *Monotonicity is held so long as Step-Error does not cross below -0.5 Figure 5. 0.5dB Major State Bit Error Figure 6. 0.5dB Attenuation Error vs. Frequency 200MHz 900MHz 1800MHz 2200MHz 0.5 dB State 1dB State 2dB State 4dB State 8dB State 15.5dB State 3000MHz 4000MHz 5000MHz 6000MHz 2 2 1.5 1.5 1 1 0.5 0.5 0 0 -0.5 -0.5 -1 -1 -1.5 -1.5 -2 -2 0 1000 2000 3000 4000 5000 6000 012 3456 789 10 11 12 13 14 15 16 Frequency (GHz) Attenuation Setting (dB) 2008-2009 Peregrine Semiconductor Corp. All rights reserved. Document No. 70-0247-06 UltraCMOS RFIC Solutions Page 2 of 11 Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: