PE43711 Product Specification UltraCMOS RF Digital Step Attenuator, 9 kHz6 GHz Features Figure 1 PE43711 Functional Diagram Flexible attenuation steps of 0.25 dB, 0.5 dB and 1 dB up to 31.75 dB Switched Attenuator Array RF RF Glitch-less attenuation state transitions Input Output Monotonicity: 0.25 dB up to 4GHz, 0.5 dB up to 5 GHz and 1 dB up to 6 GHz Extended +105 C operating temperature Parallel and Serial programming interfaces Packaging24-lead 4 4 mm QFN Parallel Applications Control 7 3G/4G wireless infrastructure Land mobile radio (LMR) system Serial In Control Logic Interface Point-to-point communication system CLK LE P/S Product Description The PE43711 is a 50 , HaRP technology-enhanced, 7-bit RF digital step attenuator (DSA) that supports a broad frequency range from 9 kHz to 6 GHz. It features glitch-less attenuation state transitions and supports 1.8V control voltage and an extended operating temperature range to +105 C, making this device ideal for many broadband wireless applications. The PE43711 is a pin-compatible upgraded version of the PE43502, PE43503, PE43602 and PE43702. An integrated digital control interface supports both Serial and Parallel programming of the attenuation, including the capability to program an initial attenuation state at power-up. The PE43711 covers a 31.75 dB attenuation range in 0.25 dB, 0.5 dB and 1 dB steps. It is capable of maintaining 0.25 dB monotonicity through 4 GHz, 0.5 dB monotonicity through 5 GHz and 1 dB monotonicity through 6 GHz. In addition, no external blocking capacitors are required if 0 VDC is present on the RF ports. The PE43711 is manufactured on pSemis UltraCMOS process, a patented variation of silicon-on-insulator (SOI) technology on a sapphire substrate. 20172020, Peregrine Semiconductor Corporation. All rights reserved. Headquarters: 9380 Carroll Park Drive, San Diego, CA, 92121 Product Specification DOC-84940-3 (5/2020) www.psemi.comPE43711 UltraCMOS RF Digital Step Attenuator pSemis HaRP technology enhancements deliver high linearity and excellent harmonics performance. It is an innovative feature of the UltraCMOS process, offering the performance of GaAs with the economy and integration of conventional CMOS. Absolute Maximum Ratings Exceeding absolute maximum ratings listed in Table 1 may cause permanent damage. Operation should be restricted to the limits in Table 2. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability. ESD Precautions When handling this UltraCMOS device, observe the same precautions as with any other ESD-sensitive devices. Although this device contains circuitry to protect it from damage due to ESD, precautions should be taken to avoid exceeding the rating specified in Table 1. Latch-up Immunity Unlike conventional CMOS devices, UltraCMOS devices are immune to latch-up. Table 1 Absolute Maximum Ratings for PE43711 Parameter/Condition Min Max Unit Supply voltage, V 0.3 5.5 V DD Digital input voltage 0.3 3.6 V RF input power, 50 9 kHz48 MHz Figure 5 dBm >48 MHz6 GHz +31 dBm Storage temperature range 65 +150 C (1) 3000 V ESD voltage HBM, all pins (2) 1000 V ESD voltage CDM, all pins Notes: 1) Human body model (MILSTD 883 Method 3015). 2) Charged device model (JEDEC JESD22-C101). Page 2 DOC-84940-3 (5/2020) www.psemi.com