Part Number 856020
140 MHz SAW Filter
Data Sheet
Features
For broadband applications
Typical 3dB bandwidth of 65 MHz
High attenuation
Single-ended operation
Ceramic Surface Mount Package (SMP)
Replaces Sawtek P/N 851948 (BW 3dB=64 MHz)
Hermetic
RoHS compliant (2002/95/EC), Pb-free
Pb
Package Pin Configuration
Surface Mount 9.00 x 7.01 x 1.50 mm Bottom View
SMP-35B
1 2 3
10 4
0.76
1.50 NOM.
1.65 MAX.
9 5
9.00
2.54
8 7 6
1.80
Single-ended Configuration
Pin No. Description
7.01 2.54
4 Output
5 Output return
9 Input
10 Input return
1.12
1.02 x 2.54 1.02 1,2,3,6,7,8 Case ground
Dimensions shown are nominal in millimeters
All tolerances are 0.15mm except overall
length and width +0.10mm/-0.15mm
Body: Al O ceramic
2 3
Lid: Kovar, Ni plated
Terminations: Au plating 0.5 - 1.0m,
over a 2 - 6m Ni plating
Subject to change or obsolescence without notice Rev E 11/07 TriQuint Semiconductor Page 1 of 6
Part Number 856020
140 MHz SAW Filter
Data Sheet
(1)
Electrical Specifications
(2) o
Operating Temperature Range: 0 to +70 C
(3) (4)
Parameter Minimum Typical Maximum Unit
Center Frequency - 140 - MHz
Minimum Insertion Loss - 17.8 20 dB
(5)
Lower 1 dB Bandedge - 108.85 111.75 MHz
Upper 1 dB Bandedge 168.25 170.27 - MHz
(5)
Lower 3 dB Bandedge - 107.45 108.5 MHz
Upper 3 dB Bandedge 171.5 172.61 - MHz
(5)
Lower 40 dB Bandedge 98 102.35 - MHz
Upper 40 dB Bandedge - 180.78 182 MHz
Amplitude Variation
111.75 - 168.25 MHz - 0.6 1.0 dB p-p
Phase Linearity
111.75 - 168.25 MHz - 5.35 10 deg p-p
Group Delay Variation
111.75 - 168.25 MHz - 21 55 ns p-p
Absolute Delay - 0.539 -
sec
(5)
Relative Attenuation
15 - 75 MHz 45 51 - dB
75 - 98 MHz 40 50 - dB
182 - 205 MHz 40 43 - dB
205 - 350 MHz 45 50 - dB
(6)
Terminating Source Impedance - 50 -
(6)
Terminating Load Impedance - 50 -
Substrate Material - 128 LiNbO - -
3
o
Temperature Coefficient of Frequency - -74 - ppm/ C
Notes:
1. All specifications are based on the TriQuint test circuit shown below
2. In production, devices will be tested at room temperature to a guardbanded specification to ensure electrical compliance over
temperature
3. Electrical margin has been built into the design to account for the variations due to temperature and manufacturing tolerances
4. Typical values are based on average measurements at room temperature
5. All attenuation measurements are measured relative to minimum insertion loss
6. This is the optimum impedance in order to achieve the performance shown
Test Circuit:
Actual matching values may vary due to PCB layout and parasitics
27nH
56nH
9 4
50 50
50
Single-ended Single-ended
47pF 33nH 22pF
50
1,2,3,5
Input Output
6,7,8,10
Subject to change or obsolescence without notice Rev E 11/07 TriQuint Semiconductor Page 2 of 6