856512-EVB Qorvo

Part Number 856512 168.5 MHz SAW Filter Data Sheet Features For WCDMA applications Usable 1 dB bandwidth of 20 MHz Low loss Single-ended operation at 50 Single-ended input balanced output at 200 Ceramic Surface Mount Package (SMP) Hermetic RoHS compliant (2002/95/EC), Pb-free Pb Package Pin Configuration Surface Mount 5.00 x 5.00 x 1.32 mm Bottom View SMP-20A 1 2 3 0.66 1.32 NOM. 4 8 1.52 MAX. 5.00 1.27 7 6 5 SE - Balanced Configuration Pin No. Description 7 Input + 5.00 3 Output + 1.27 2 Output - 1,6,5 Ground 4,8 Case Ground 2.08 0.64 Single- ended Configuration Pin No. Description 3 Input 7 Output 1,2,5,6 Ground Dimensions shown are nominal in millimeters All tolerances are 0.15mm except overall 4,8 Case Ground length and width +0.15/-0.10mm Body: Al O ceramic 2 3 Lid: Kovar, Ni plated Terminations: Au plating 0.5 - 1.0m, over a 2 6m Ni plating Subject to change or obsolescence without notice Rev D 12/08 TriQuint Semiconductor Page 1 of 6 Part Number 856512 168.5 MHz SAW Filter Data Sheet (1) Electrical Specifications (2) Operating Temperature Range: -20 to +80 C (3) (4) Parameter Minimum Typical Maximum Unit Center Frequency - 168.5 - MHz Minimum Insertion Loss 158.5 178.5 MHz - 8.0 9.0 dB 1.0 dB Bandwidth 22 26.4 - MHz Amplitude Variation 158.5 178.5 MHz - 0.6 1.0 dB Group Delay Ripple 158.5 178.5 MHz - 20 40 nsec 160.5 176.5 MHz - 20 40 nsec (5) Relative Attenuation 10 100 MHz 50 61 - dB 100 149 MHz 33 41 - dB 149 150.5 MHz 20 32 - dB 150.5 153.5 MHz 3 6.5 - dB 183.5 186.5 MHz 2 4.5 - dB 186.5 190 MHz 19 32 - dB 190 250 MHz 33 42 - dB 250 310 MHz 40 56 - dB 310 410 MHz 50 59 - dB 410 1000 MHz 55 59 - dB Input/Output Return Loss 158.5 178.5 MHz 10 14 - dB EVM 158.5 163.5 MHz - 1.2 2.5 % 163.5 168.5 MHz - 1.2 2.6 % 168.5 173.5 MHz - 1.2 2.5 % 173.5 178.5 MHz - 1.3 2.5 % (6) Source Impedance (single-ended) - 50 - (6) Load Impedance (single-ended) - 50 - (6) Load Impedance (balanced) - 200 - Notes: 1. All specifications are based on the TriQuint test circuit matching schematics shown on page 5 2. In production, devices will be tested at room temperature to a guardbanded specification to ensure electrical compliance over temperature 3. Electrical margin has been built into the design to account for the variations due to temperature drift and manufacturing tolerances 4. Typical values are based on average measurements at room temperature 5. Relative to minimum insertion loss 6. This is the optimum impedance in order to achieve the performance shown Subject to change or obsolescence without notice Rev D 12/08 TriQuint Semiconductor Page 2 of 6