Part Number 857191 810 MHz SAW Filter Data Sheet Features Usable bandwidth 5 MHz High attenuation No impedance matching required for operation at 50 Single-ended operation Ceramic Surface Mount Package (SMP) Hermetic RoHS compliant (2002/95/EC), Pb-free Pb Package Pin Configuration Surface Mount 3.00 x 3.00 x 1.22 mm Bottom View SMP-12 1 2 3 1.22 NOM. 1.32 MAX. 0.69 3.00 6 5 4 0.75 Single-ended Configuration 1.50 Pin No. Description 3.00 2 Input 0.75 5 Output 1,3,4,6 Case ground 0.60 Dimensions shown are nominal in millimeters All tolerances are 0.15mm except overall length and width 0.10mm Body: Al O ceramic 2 3 Lid: Kovar, Ni plated Terminations: Au plating 0.5 - 1.0m, over a 2 - 6m Ni plating Subject to change or obsolescence without notice Rev - 09/12 TriQuint Semiconductor, Inc. Page 1 of 5 Part Number 857191 810 MHz SAW Filter Data Sheet (1) Electrical Specifications (2) o Operating Temperature Range: -55 to +85 C (3) (4) Parameter Minimum Typical Maximum Unit Center Frequency - 810 - MHz Maximum Insertion Loss 807.5 - 812.5 MHz - 4.6 5.5 dB (5) Amplitude Ripple 807.5 - 812.5 MHz - 0.7 1.0 dB Group Delay Variation 807.5 - 812.5 MHz - 88 150 ns Absolute Attenuation 10 - 770 MHz 50 54 - dB 770 - 793 MHz 30 48 - dB 793 - 795 MHz 20 41 - dB 795 - 797 MHz 10 32 - dB 823 - 825 MHz 10 32 - dB 825 - 827 MHz 20 41 - dB 827 - 850 MHz 30 48 - dB 850 - 1500 MHz 50 54 - dB 1500 - 2500 MHz 35 38 - dB (6) Source Impedance - 50 - (6) Load Impedance - 50 - Notes: 1. All specifications are based on the TriQuint test circuit shown below 2. In production, devices will be tested at room temperature to a guardbanded specification to ensure electrical compliance over temperature 3. Electrical margin has been built into the design to account for the variations due to temperature drift and manufacturing tolerances 4. Typical values are based on average measurements at room temperature 5. Amplitude ripple is defined as the worst case difference between the peak and adjacent valley within the defined frequency points 6. This is the optimum impedance in order to achieve the performance shown Test Circuit: 2 5 50 50 Single-ended Single-ended 50 50 No impedance matching No impedance matching 1,3,4,6 required required Subject to change or obsolescence without notice Rev - 09/12 TriQuint Semiconductor, Inc. Page 2 of 5