QPL6207Q High-Linearity SDARS LNA Product Description The QPL6207Q is a high linearity, ultra-low noise gain block amplifier in a small 2x2 mm surface-mount package. At 2332 MHz, the amplifier typically provides +35 dBm OIP3. The amplifier does not require any negative supplies for operation and can be biased from positive supply rails from 3.3 to 5.25 V. The device is housed in a lead- free/green/RoHS-compliant industry-standard 2x2 mm package. Package: DFN, 8-pin The QPL6207Q uses a high performance E-pHEMT process. 2.0mm x 2.0mm x 0.85mm The low noise amplifier contains an internal active bias to maintain high performance over temperature. Feature Overview Tested in accordance to AEC-100 Grade 2 Functional Block Diagram High Gain device Typical value 18.5dB Ultra-low noise figure, 0.45 dB NF at 2332 MHz High linearity, +35 dBm Output IP3 High input power ruggedness, >29 dBm PIN, MAX Unconditionally stable Externally controlled Icq with Vbias Integrated shutdown control pin 3.3-5.25 V positive supply voltage: Vgg not required Applications SDARS Active Antenna Ordering Information PART NUMBER DESCRIPTION QPL6207QSB 5 PIECE SAMPLE BAG QPL6207QSQ 25 PIECE SAMPLE BAG QPL6207QSR 100 PIECE 7 REEL QPL6207QTR7 2500 PIECE 7 REEL QPL6207QPCK-01 EVALUATION BOARD + 5 PIECE SAMPLE BAG DS Rev C 1 of 7 www.qorvo.com Subject to change without notice QPL6207Q High-Linearity SDARS LNA Absolute Maximum Ratings PARAMETER RATING UNITS Storage Temperature -65 to 150 C Supply Voltage (VDD) +7 V RF Input Power, CW, 50,T = 25C +30 dBm Recommended Operating Conditions PARAMETER MIN TYP MAX UNITS Supply Voltage (V ) +3.3 +4.5 +5.25 V DD Bias Voltage (Vbias) +3.3 +3.6 +5.25 V T CASE 40 +105 C 6 +190 C T (for >10 hours MTTF) J Electrical Specifications at +25 C PARAMETER CONDITIONS MIN TYP MAX UNITS Operational Frequency Range 2320 2332 2345 MHz Test Frequency 2330 MHz Gain 18.1 18.5 20 dB Input Return Loss 9.5 dB Output Return Loss 8.5 dB Output P1dB +19.5 +21.5 dBm Output IP3 Pout=+5 dBm/tone, f=1 MHz +31 +35 dBm 1 0.45 0.7 dB Noise Figure On state 0 0.63 V Power Shutdown Control (Pin 6) Off state (Power down) 1.17 3.3 VDD V On state 38 55 68 mA 2 Current, I DD Off state (Power down) 3 5 mA Shutdown pin current, I V 1.17 V 60 500 A SD PD Thermal Resistance, jc Channel to case 53.4 C/W Test conditions unless otherwise noted: VDD = +4.5V, Vbias = +3.6V, Temp=+25C, 50 system Note: 1) Noise Figure data has input trace loss de-embedded 2) Icq set by external 2.7K resistor DS Rev C 2 of 7 www.qorvo.com Subject to change without notice