TQL9062 High Linearity Gain Block with Shutdown General Description The TQL9062 is a cascadable high-linearity gain block 8 pin 2x2 mm DFN Package amplifier in a small 2 x 2 mm surface-mount package. At 3.5 GHz, the amplifier typically provides 16.3 dB gain, +43.6 dBm OIP3 at a 120 mA bias setting, and 1.4 dB noise figure. The LNA can be biased from a single positive supply ranging from 3.3 to 5 volts. Applications The TQL9062 has good noise figure and high linearity Repeaters / DAS performance allowing the device to be used in both receiver and transmitter chains for high performance Mobile Infrastructure systems. The gain block is internally matched using a high LTE / WCDMA / CDMA / GSM performance E-pHEMT process and only requires four General Purpose Wireless external components for operation from a single positive TDD or FDD systems supply: an external RF choke and blocking/bypass capacitors. This low noise amplifier contains an internal active bias circuit to maintain high performance over temperature and integrates a shut-down capability to allow for operation in TDD applications. Product Features The TQL9062 covers the 500-6000 MHz frequency band and is targeted for wireless infrastructure or other 0.5-6.0 GHz Operational Bandwidth applications requiring high linearity and/or low noise figure. 16.3 dB Gain at 3.5 GHz 43.6 dBm OIP3 at 3.5 GHz 1.8V TTL logic compatible for shut-down control Unconditionally stable Integrated on-chip matching, 50 ohm in/out Functional Block Diagram Integrated active bias Pin 1 Reference Mark 1 8 NC NC 2 7 RF In RF Out 3 6 NC Shut Down 4 5 NC NC Backside Paddle - RF/DC GND Ordering Information Part No. Description TQL9062 High Linearity Gain Block TQL9062-PCB 0.5-6.0 GHz Evaluation Board Standard T/R size = 2500 pieces on a 7 reel Data Sheet, April 30, 2018 Subject to change without notice 1 of 9 www.qorvo.com TQL9062 High Linearity Gain Block with Shutdown Absolute Maximum Ratings Recommended Operating Conditions Parameter Rating Parameter Min Typ Max Units Storage Temperature 65 to 150C Supply Voltage (VDD) 3.3 5.0 5.25 V Supply Voltage (V ) +7 V T 40 +105 C DD CASE 6 RF Input Power, CW, 50, T=25C +33 dBm Tj for >10 hours MTTF +190 C RF Input Power, WCDMA, 10dB PAR +27 dBm Electrical specifications are measured at specified test RF Input Power, CW, OFF State +33 dBm conditions. Specifications are not guaranteed over all recommended operating conditions. Operation of this device outside the parameter ranges given above may cause permanent damage. Electrical Specifications Test conditions unless otherwise noted: VDD =+5V, Temp=+25C, 50 system. Parameter Conditions Min Typ Max Units Operational Frequency Range 500 6000 MHz Test Frequency 3500 MHz Gain 15 16.5 18 dB Input Return Loss 13 dB Output Return Loss 18 dB (1) Noise Figure 1.4 dB Output P1dB +21.3 dBm Output IP3 Pout=+7 dBm/tone, f=1 MHz +35 +41 dBm On state 0 0.63 V Power Shutdown Control (pin 6) Off state (Power down) 1.17 VDD V On state 80 122 150 mA Current, IDD Off state (Power down) 3 mA Shutdown pin current, I V 1.17 V 200 A SD PD LNA ON to OFF 520 ns Switching Speed LNA OFF to ON 450 ns Thermal Resistance, channel to case 48 C/W jc Note: 1) Noise figure data has input trace loss de-embedded. Data Sheet, April 30, 2018 Subject to change without notice 2 of 9 www.qorvo.com