TQP3M9036 Ultra-Low Noise, High Linearity LNA Product Overview The TQP3M9036 is a high linearity, ultra-low noise gain block amplifier in a small 2x2 mm surface-mount package. At 900 MHz, the amplifier typically provides high 19.8 dB gain, +36 dBm OIP3, and 0.45 dB Noise Figure while 8-pin 2x2 mm DFN Package drawing 68 mA current from a 5V supply. The amplifier does not require any negative supplies for operation and can be biased from positive supply rails from 3.3 to 5 V. Key Features The device is housed in a lead-free/green/RoHS-compliant industry-standard 2x2 mm package. 502000 MHz Operational Bandwidth The TQP3M9036 is internally matched using a high- Ultra-low noise figure, 0.45 dB NF at 900 MHz performance E-pHEMT process and only requires 4 High gain, 19.8 dB Gain at 900 MHz external components for operation from a single positive High linearity, +36 dBm Output IP3 supply: an external RF choke and blocking/bypass High input power ruggedness, >22 dBm P IN, MAX capacitors. The low noise amplifier contains an internal Unconditionally stable active bias to maintain high performance over temperature and integrates a shut-down biasing capability for TDD Integrated on-chip matching, 50 ohm in/out applications. Integrated active bias Integrated shutdown control pin The TQP3M9036 covers the 502000 MHz frequency band 3-5 V positive supply voltage: Vgg not required and is targeted for wireless infrastructure. The LNA is pin Pin compatible with high-band TQP3M9037 compatible with the high-band, 15002700 MHz TQP3M9037. Functional Block Diagram Applications Repeaters Pin 1 Reference Mark Mobile Infrastructure LTE / WCDMA / CDMA / GSM 1 8 NC NC General Purpose Wireless TDD or FDD systems 2 7 RF In RF Out 3 6 NC Shut Down 4 5 NC NC Backside Paddle - RF/DC GND Top View Ordering Information Part No. Description TQP3M9036 Ultra low noise, High IP3 LNA TQP3M9036PCB 1002000 MHz Evaluation Board Standard T/R size = 2500 pieces on a 7 reel Datasheet, November 27, 2018 Subject to change without notice 1 of 12 www.qorvo.com TQP3M9036 Ultra-Low Noise, High Linearity LNA Absolute Maximum Ratings Recommended Operating Conditions Parameter Rating Parameter Min Typ Max Units Storage Temperature 65 to 150C Device Voltage (VCC) +3.3 +5.0 +5.25 V T 40 +105 C RF Input Power, CW, 50, T=+25C +22dBm CASE 6 Device Voltage (V ) +7V Tj for >10 hours MTTF +190 C DD Electrical specifications are measured at specified test conditions. Operation of this device outside the parameter ranges given Specifications are not guaranteed over all recommended operating above may cause permanent damage. conditions. Electrical Specifications Test conditions unless otherwise noted: VDD = +5V, Temp=+25C, 50 system. Parameter Conditions Min Typ Max Units Operational Frequency Range 50 2000 MHz Test Frequency 900 MHz Gain 18.2 19.8 21.2 dB Input Return Loss Note 1 13 dB Output Return Loss Note 1 11 dB Output P1dB +20 dBm Output IP3 Pout=+5 dBm/tone, f=1 MHz +32 +36 dBm Noise Figure 0.45 0.75 dB On state 0 0.4 V (3) Power Shutdown Control Off state (Power down) 2.5 3.3 VDD V On state 40 68 90 mA Current, I DD Off state (Power down) 3 4 mA Shutdown pin current, I V 3 V 140 A SD PD ON time (50%Ctrl to 90% RF) 1 s (4) Switching Speed OFF time (50%Ctrl to 10% RF) 0.5 s Thermal Resistance, jc channel to case 62 C/W Notes: 1. Input and output return loss can be improved to better than 15 dB with minimal impact on noise figure by adjusting the values of the bias inductor and output DC blocking capacitor. Refer to the Optimized Return Loss reference design on page 7. 2. Current can be reduced by operating at a lower device voltage. (example: Idd=50 mA at Vdd=4 V) 3. Voltage referred to J5 turret on evaluation board (pg.4). 4. Switching speed can be improved by reducing the value of C1 of schematic on pg. 4. Pin 6 (V ) voltage limits PD min Max Units V 0 0.1 V low V 0.5 V V high DD Datasheet, November 27, 2018 Subject to change without notice 2 of 12 www.qorvo.com