RXCA10S066PF34-IDK00A ReFLEX CES

ALARIC Instant-DevKit Arria 10 SoC FMC IDK The Arria 10 SoC FMC Instant-Development Kit provides to developers the best Out-Of-The box experience, combining the Best-In Class compact hardware platform and the most efficient intuitive software environment. TM TM Dual-core ARM Cortex -A9 MPCore hard processor system (HPS). Target markets: DevKitInvasion Medical ACHILLES Industrial Arria 10 SoC SoM IDK Test & Measurement SARGON Video capture and processing Stratix 10 FPGA FMC+ IDK Contact : Europe Sales Office North America Sales Office sales reflexces.com www.reflexces.com salesusa reflexces.comALARIC Instant-DevKit Arria 10 SoC SoM IDK Featured Device Arria 10 SoC 660 KLEs Board based on Intel Arria 10 SoC 660KLEs, speed grade On board DDR3 for FPGA (2GB) speed up to 2133 MT/s* -2 by default DisplayPort Rev1.2 (up to 5.4Gbit/s) PCIe end point edge connector for Gen3 x4 (32Gb/s) One microSD 8 GB SDHC Class 10 (already insert into the support PCIe root Complex edge connector for Gen3 x4 (32Gb/s) connector) with factory image boot FMC High Pin Count fully compliant: Mini USB connector B-type to enable the USB2.0 PHY OTG high speed, ULPI interface connected to the HPS of the FPGA 168 LVCMOS (1.8V) or 84 LVDS (1.8V,2.5V) MAX 10 Power supplies monitoring with its ADCs solution 10 XCVR (Typical 10Gb/s) Innovative clock tree (Silicon Labs) One serial over USB High speed link (through USB Hub) +12V on a JACK/Edge PCIe connector / ATX connector 2 x RJ45 copper connector 10/100/1000Base-T Ethernet connected to the FPGA core fabric part Active Heat sink 1 x RJ45 copper connector 10/100/1000Base-T Ethernet PCIe Bracket, LED connected to the HPS part of the FPGA SATA connector to FPGA 1 x XCVR On board DDR3 for HPS (2GB) speed up to 2133 MT/s* MCX connector for PPS interface * Depends on FPGA speed grade Mictor connector for HPS debug trace Board Programming Clock Circuitry JTAG : On-board USB-Blaster II MAX V (reachable by USB Hub) 3 x SMA connectors (1 main input clock + 1 diff. output programmable clock) Fast passive parallel (FPP) configuration via MAX10 device and flash memory 9 x FPGA XCVR programmable inputs Clocks (up to 800 MHz AS configuration supported with NOR FLASH to reach different communication protocol) Boot selection for HPS throught user dipswitch Board Size Kit Content Alaric Arria 10 SoC FMC PCIe DevKit Length : 240 mm (9.45 inches) Power adapter (US, UK, EU, JP) and Micro USB2.0 cable Height : 111.15 mm (4.38 inches) / Standard Height PCIe One microSD 8 GB SDHC Class 10 Standard Thickness PCIe PDF Documentation (Starter Guide, Hardware Reference Manual, Board Outline, Schematics) FMC Interface Control Excel sheet Power & Environmental Board test design files available under FTP after the creation Power : 75W max/ 40W typical of a user account (Quartus Prime Pro software required) Environmental : 0C/ +60C Software Board support packages for Hard Processing System Interface (HPS) available under FTP after the creation of a user account (Reserved for software engineers experimented with Linux) Kit Ordering information Under request on the online support support.reflexces.com : RXCA10S066PF34-IDK00A (Production version) Quartus Prime Pro DKE = Development Kit (FPGA Arria 10 SX 660) Mechanical files (DWF/STEP models and 2D drawing) REFLEX CES 2017-All Rights Reserved June/v5.4 www.reflexces.com