SARGON Instant-DevKit Stratix 10 FPGA & SoC FMC+ IDK The Stratix 10 FPGA FMC+ Instant-Development Kit pro- vides to developers the best Out-Of-The box experience, combining the Best-In Class compact hardware platform and the most efficient intuitive software environment. Its unique install and GUI interface allows an immediate start, and its reference designs enable fast turn-around designs, shortening and securing the developments. Target markets: High Performance Computing IP & Asic Prototyping DevKitInvasion ALARIC ACHILLES SARGON ATTILA Arria 10 SoC FMC IDK Arria 10 SoC SoM IDK Stratix 10 FPGA FMC+ IDK Arria 10 FPGA FMC IDK Contact : Europe Sales Office North America Sales Office sales reflexces.com www.reflexces.com salesusa reflexces.comSARGON Instant-DevKit Stratix 10 FPGA FMC+ IDK Full specifications Stratix 10 GX or SX 2800 KLEs FPGA configuration Communication Interfaces Intel Stratix 10 GX or SX 2800 KLEs, speed grade -2 2x FireFly SAMTEC quad connector (28Gb/s each XCVR) - 1 FireFly connected to 100G IP PCIe Gen3 x16, Gen4 x8 capable MiniSAS quad connector (1 HD SAS, 4 SATA HDD, NVMe inter L-tile and H-tile compatible face capable) Max10 USB Blaster on board, UART over USB interface GPIO extension connector : 9 LVDS usable as 18 LVCMOS 1x Nor Flash 1GB quad SPI FPGA AS configuration XCVR extension connector : 10 XCVR, 8 LVDS, Clock In&Out 1x Nor Flash 1GB for configuration mode ST8 48 dedicated HPS IO connector (daughter board for SX) Board Management Controller (BMC) for monitoring, EPCQ and clock 1x Ethernet SGMII interface (to FPGA), Marvel Phy 88E11 programmation, IPMI features 1x FMC+ (VITA57.4) with 20 XCVR up to 28Gb/s, 4 XCVR up to Clock Circuitry 17.4Gb/s, 8 XCVR connected to the 2x Hard IP 100G transceivers blocks Programmable PLL oscillator (Si5341), output clocks frequency between 0.0001 MHz to 750 MHz 2x banks DDR4 vertical RDIMM, 16-32GBytes capable each, x72bit, High precision oscillator, clock accuracy 20MHz- 0.01ppm for up to 2400MT/s Precision Time Protocol (PTP) IEEE 1588 1x bank DDR4, bus x72, 8GBytes up to 2400MT/s (HPS bank mutual One coax connector for PPS (pulse per second) with FPGA) Board dimensions : 254mm x 111.5mm , Dual slot PCIe Power : Max 240W including FMC board, delivered with active heat-sink Standards and compliance Operating range : 0C / +70C RoHS/REACH compliant UL certified ISO9001 Facility Kit Content Full height two slots PCIe board with active heat-sink and PCIe bracket Board Support Package (hardware documentation, HDL Test Designs, FMC+ and extension connectors FPGA pinout connection ) Power adapter (US, UK, EU, JP) and user cables Kernel Linux support, U-boot bootloader and comprehensive user FMC+ Loop back board for test and debug documentation 2x DDR4 16Go 24000MT/s VLP RDIMM One year Quartus Prime Pro DKE / OpenCL SDK license Capacitive Touch Panel with I2C Interface, 800 x 480 Pixels 3.3V LCD, OpenCL HPC BSP included with the DevKit (delivery upon request ) 24-bit Parallel RGB Interface Mechanical package (under request) REFLEX CES innovative software interface (GUI) / Windows64 Ordering information Development Kit, Intel Stratix 10 FPGA, H-Tile, ES = RXCS10X280HAF50-IDK00A Development Kit, Intel Stratix 10 FPGA, H-Tile, Prod = RXCS10X280HPF50-IDK00A Development Kit, Intel Stratix 10 SoC, H-Tile, Prod = RXCS10S280HPF50-IDK00A REFLEX CES 2017-All Rights Reserved October/v1.2 www.reflexces.com