Integrated Device Technology, Inc. Document Type: Data Sheet ICS1893CF Document Stage: Rev. K Release 3.3-V 10Base-T/100Base-TX Integrated PHYceiver General Features The ICS1893CF is a low-power, physical-layer device (PHY) Supports category 5 cables with attenuation in excess of that supports the ISO/IEC 10Base-T and 100Base-TX 24dB at 100 MHz. Carrier-Sense Multiple Access/Collision Detection Single-chip, fully integrated PHY provides PCS, PMA, PMD, (CSMA/CD) Ethernet standards, ISO/IEC 8802-3. and AUTONEG sub layers functions of IEEE standard. The ICS1893CF is intended for MII, Node applications that require the Auto-MDIX feature that automatically corrects 10Base-T and 100Base-TX IEEE 8802.3 compliant crossover errors in plant wiring. Single 3.3V power supply The ICS1893CF incorporates Digital-Signal Processing (DSP) Highly configurable, supports: control in its Physical-Medium Dependent (PMD) sub layer. As Media Independent Interface (MII) a result, it can transmit and receive data on unshielded Auto-Negotiation with Parallel detection twisted-pair (UTP) category 5 cables with attenuation in Node applications, managed or unmanaged excess of 24 dB at 100MHz. With this ICS-patented 10M or 100M full and half-duplex modes technology, the ICS1893CF can virtually eliminate errors from Loopback mode for Diagnostic Functions killer packets. Auto-MDI/MDIX crossover correction The ICS1893CF provides a Serial-Management Interface for Low-power CMOS (typically 400 mW) exchanging command and status information with a Power-Down mode typically 21mW Station-Management (STA) entity. The ICS1893CF Media-Dependent Interface (MDI) can be configured to Clock and crystal supported provide either half- or full-duplex operation at data rates of 10 Fully integrated, DSP-based PMD includes: Mb/s or 100Mb/s. Adaptive equalization and baseline-wander correction The ICS1893CF is available in a 300-mil 48-lead SSOP Transmit wave shaping and stream cipher scrambler package. The ICS1893CF shares the same proven MLT-3 encoder and NRZ/NRZI encoder performance circuitry with the ICS1893BF and is a pin-for-pin Small footprint 48-pin 300 mil. SSOP package replacement of the 1893BF. Also available in small footprint 56-pin 8x8 MLF2 package Applications: NIC cards, PC motherboards, switches, Available in Industrial Temp routers, DSL and cable modems, game machines, printers, network connected appliances, and industrial equipment. ICS1893CF Block Diagram 100Base-T PCS PMA TP PMD Framer Clock Recovery MLT-3 10/100 MII Twisted- Interface Integrated CRS/COL Link Monitor Stream Cipher MAC Detection Signal Detection Adaptive Equalizer Pair MUX Switch Interface Parallel to Serial Error Detection Baseline Wander Interface to 4B/5B Correction Magnetics Modules and 10Base-T RJ45 Connector MII Low-Jitter Auto- Configuration Extended MII Clock Negotiation and Status Register Management Synthesizer Set Interface Clock Power LEDs and PHY Address ICS1893CF, Rev. K, 05/13/10 IDT reserves the right to make changes in the device data identified in May, 2010 this publication without further notice. IDT advises its customers to obtain the latest version of all device data to verify that any information being relied upon by the customer is current and accurate.ICS1893CF Data Sheet - Release Revision History Revision History Initial preliminary release of this document, Rev A, dated July 10, 2006. Rev B remove all references to ICS1893CK removed package drawing and ordering info. Rev C added CK package and ordering information back to datasheet removed TOC. Rev E changed resistor values in table 9.3 and on Figure 9-1, ICS1893CF 10TCSR and 100TCSR. Rev G added top side marking for 1893CKILF. Rev H updated hex numerology in table 7-9. Rev J, 8/11/09 added EOL note for ordering information per PDN U-09-01. Rev K, 5/13/10 removed non-green parts ordering information per PDN U-09-01. ICS1893CF, Rev. K, 05/13/10 May, 2010 Copyright 2009, Integrated Device Technology, Inc. All rights reserved. 2