High-Performance 1.8V/2.5V/3.3V Crystal 5P8390x Input to LVCMOS Clock Fanout Buffer with OE DATASHEET Description Features The 5P8390x is a high performance, 1-to-4/6/8 crystal input to 4/6/8 copies of LVCMOS output clocks with best-in-class LVCMOS fanout buffer with output enable pins. This device phase noise performance accepts a fundamental mode crystal from 10MHz to 40MHz Phase Noise: and outputs LVCMOS clocks with best-in-class phase noise Offset Noise Power (3.3V) performance. 100Hz: -131 dBc/Hz The 5P8390x family (5P83904, 5P83905, and 5P83908) 1KHz: -145 dBc/Hz features a synchronous glitch-free Output Enable function to 10KHz: -154 dBc/Hz eliminate any intermediate incorrect output clock cycles when 100KHz: -161 dBc/Hz enabling or disabling outputs. It comes in standard TSSOP Operating power supply modes: packages or small QFN packages and can operate from 1.8V Full 3.3V, 2.5V, 1.8V to 3.3V supplies. Mixed 3.3V core/2.5V output operating supply Mixed 3.3V core/1.8V output operating supply Mixed 2.5V core/1.8V output operating supply Crystal Oscillator Interface Synchronous Output Enable Packaged in 16-, 20-pin TSSOP and QFN packages (Pb free, fully RoHS compliant) Extended (-40C to +105C) temperature range 5P83904 Block Diagram CLK0 XTAL IN OSC CLK1 XTAL OUT CLK2 ENABLE1 SYNC1 CLK3 ENABLE2 SYNC2 5P8390x OCTOBER 5, 2016 1 2016 Integrated Device Technology, Inc.5P8390x DATASHEET 5P83905 Block Diagram CLK0 XTAL IN OSC CLK1 XTAL OUT CLK2 CLK3 CLK4 ENABLE1 SYNC1 CLK5 ENABLE2 SYNC2 5P83908 Block Diagram CLK0 XTAL IN OSC CLK1 XTAL OUT CLK2 CLK3 CLK4 CLK5 CLK6 ENABLE1 SYNC1 CLK7 ENABLE2 SYNC2 HIGH-PERFORMANCE 1.8V/2.5V/3.3V CRYSTAL INPUT TO LVCMOS CLOCK FANOUT BUFFER WITH OE 2 OCTOBER 5, 2016