6V31021NLGI8 Renesas

DATASHEET 4-OUTPUT LOW POWER FANOUT BUFFER FOR PCIE GEN3 AND 10G ETHERNET IDT6V31021 General Description Features/Benefits The IDT6V31021 is a 4-output low- power differential buffer. Low power differential outputs power efficient Each output has its own OE pin. It has a maximum Power down mode when all OE are high reduces operating frequency of 167 MHz and supports all SERDES system standby power clock frequencies for Freescale QorIQ CPUs. Industrial temperature range can be used in demanding environments Recommended Application 20-pin MLF space savings PCIe Gen1/2/3 or Ethernet Fanout Buffer,or any application requiring low additive phase jitter. Key Specifications Output cycle-cycle jitter <15ps additive Output Features Output to Output skew: <50ps 4 - low power differential output pairss PCIe Gen3 addtive phasejitter <0.3ps rms Individual OE control of each output pair 10.3125G/64 additive phase jitter <100fs rms Block Diagram 4 OE (3:0) 4 DIF INT STOP DIF LPR(3:0) LOGIC DIF INC IDT 4-OUTPUT LOW POWER FANOUT BUFFER FOR PCIE GEN3 AND 10G ETHERNET 1 IDT6V31021 REV A 121311IDT6V31021 4-OUTPUT LOW POWER FANOUT BUFFER FOR PCIE GEN3 AND 10G ETHERNET Pin Configuration 20 19 18 17 16 VDDA 1 15 VDD IO GNDA 2 14 GND OE3 3 13 OE1 6V31021 DIF3C LPR 4 12 DIF1T LPR DIF3T LPR 5 11 DIF1C LPR 67 89 10 20-pin MLF Power Connections Pin Number (MLF) Description VDD GND 6,15 7,14 VDD IO for DIF(3:0) 1 2 3.3V Analog VDD & GND Terminations Zo Rs Zo Rs Zo 17 = Rs (ohms), where Zo is the single-ended intrinsic impedance of the board transmission line. Single-ended intrinsic impedance is that of the differential impedance. Single Ended Rs Impedance 5% Rs (Zo) tolerance 2% tolerance Notes 50 33 33.2 In general, 5% resistors 45 27 27.4 may be used. All values are 42.5 24 or 27 24.9 in ohms. IDT 4-OUTPUT LOW POWER FANOUT BUFFER FOR PCIE GEN3 AND 10G ETHERNET 2 IDT6V31021 REV A 121311 VDD IO DIF INT GND DIF INC DIF2C LPR OE0 DIF2T LPR DIF0T LPR OE2 DIF0C LPR