HIGH-SPEED 3.3V 8/4K x 18 DUAL-PORT IDT70V35/34S/L 8/4K x 16 DUAL-PORT IDT70V25/24S/L STATIC RAM Features Separate upper-byte and lower-byte control for multiplexed True Dual-Ported memory cells which allow simultaneous bus compatibility reads of the same memory location IDT70V35/34 (IDT70V25/24) easily expands data bus width High-speed access to 36 bits (32 bits) or more using the Master/Slave select IDT70V35/34 when cascading more than one device Commercial: 15/20/25ns (max.) M/S = VIH for BUSY output flag on Master Industrial: 20ns M/S = VIL for BUSY input on Slave IDT70V25/24 BUSY and Interrupt Flag Commercial: 15/20/25/35/55ns (max.) On-chip port arbitration logic Industrial: 20/25ns Full on-chip hardware support of semaphore signaling Low-power operation between ports IDT70V35/34S IDT70V35/34L Fully asynchronous operation from either port Active: 430mW (typ.) Active: 415mW (typ.) LVTTL-compatible, single 3.3V (0.3V) power supply Standby: 3.3mW (typ.) Standby: 660W (typ.) Available in a 100-pin TQFP (IDT70V35/24) & (IDT70V25/24), 86-pin PGA (IDT70V25/24) and 84-pin PLCC (IDT70V25/24) IDT70V25/24S IDT70V25/24L Industrial temperature range (-40C to +85C) is available Active: 400mW (typ.) Active: 380mW (typ.) for selected speeds Standby: 3.3mW (typ.) Standby: 660W (typ.) Green parts available, see ordering information Functional Block Diagram R/WL R R/W UBL UBR LBL LBR CEL CER OEL OER , (5) (5) I/O9R-I/O17R I/O9L-I/O17L I/O I/O Control Control (4) (4) I/O0R-I/O8R I/O0L-I/O8L (2,3) (2,3) BUSYL BUSYR (1) (1) A12R A12L Address MEMORY Address Decoder ARRAY Decoder A0L A0R 13 13 ARBITRATION INTERRUPT CER CEL SEMAPHORE OER OEL LOGIC R/WL R/WR SEMR SEML (3) (3) M/S INTR INTL 5624 drw 01 NOTES: 1. A12 is a NC for IDT70V34 and for IDT70V24. 2. (MASTER): BUSY is output (SLAVE): BUSY is input. 3. BUSY outputs and INT outputs are non-tri-stated push-pull. 4. I/O0x - I/O7x for IDT70V25/24. 5. I/O8x - I/O15x for IDT70V25/24. OCTOBER 2008 1 DSC-5624/7 2008 Integrated Device Technology, Inc.IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/4K x 18 (8/4K x 16) Dual-Port Static RAM Industrial and Commercial Temperature Ranges Description The IDT70V35/34 (IDT70V25/24) is a high-speed 8/4K x 18 (8/4K feature controlled by CE permits the on-chip circuitry of each port to enter x16) Dual-Port Static RAM. The IDT70V35/34 (IDT70V25/24) is de- a very low standby power mode. signed to be used as a stand-alone Dual-Port RAM or as a combination Fabricated using IDTs CMOS high-performance technology, these MASTER/SLAVE Dual-Port RAM for 36-bit (32-bit) or wider memory devices typically operate on only 430mW (IDT70V35/34) and 400mW system applications results in full-speed, error-free operation without the (IDT70V25/24) of power. need for additional discrete logic. The IDT70V35/34 (IDT70V25/24) is packaged in a plastic 100-pin This device provides two independent ports with separate control, Thin Quad Flatpack. The IDT70V25/24 is packaged in a ceramic 84-pin address, and I/O pins that permit independent, asynchronous access for PGA and 84-Pin PLCC. reads or writes to any location in memory. An automatic power down (1,2,3,4) Pin Configurations 06/24/04 Index 100 9998 9796959493929190898887868584 838281807978 7776 1 N/C N/C 75 N/C 2 74 N/C I/O8L 3 73 N/C I/O17L 4 72 N/C I/O11L 5 71 A5L I/O12L 6 70 A4L I/O13L 7 69 A3L I/O14L 8 68 A2L Vss 9 67 A1L 15L 10 66 I/O A0L IDT70V35/34PF 65 I/O16L 11 INTL (5) PN100-1 VDD 12 64 BUSYL 63 Vss 13 Vss 100-Pin TQFP 14 62 I/O0R M/S (6) Top View 61 I/O1R 15 BUSYR 60 I/O2R 16 INTR 59 VDD 17 A0R I/O3R 18 58 A1R 57 I/O4R 19 A2R 56 I/O5R 20 A3R 55 I/O6R 21 A4R 54 I/O8R 22 N/C 53 I/O17R 23 N/C 52 N/C 24 N/C 51 N/C 25 N/C 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 , 5624 drw 02 NOTES: 1. A12 is a NC for IDT70V34. 2. All VDD pins must be connected to power supply. 3. All VSS pins must be connected to ground. 4. PN100-1 package body is approximately 14mm x 14mm x 1.4mm. 5. This package code is used to reference the package diagram. 6. This text does not indicate orientation of the actual part marking. 6.422 I/O7R I/O10L I/O9R I/O9L I/O10R I/O7L I/O11R I/O6L I/O5L I/O12R I/O13R I/O4L I/O14R I/O3L I/O2L I/O15R Vss Vss I/O1L I/O16R I/O0L OER R/WR OEL VDD Vss R/WL SEMR SEML CER CEL UBR UBL LBR (1) A12R LBL (1) A12L A11R A10R A11L A10L A9R A9L A8R A8L A7R A7L A6R A6L A5R